Patents by Inventor Jay Jayasimha

Jay Jayasimha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8327113
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 4, 2012
    Assignee: Intel Corporation
    Inventors: Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas
  • Patent number: 8171121
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: May 1, 2012
    Assignee: Intel Corporation
    Inventors: Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas
  • Patent number: 7734741
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: June 8, 2010
    Assignee: Intel Corporation
    Inventors: Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas
  • Publication number: 20090055600
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: September 23, 2008
    Publication date: February 26, 2009
    Inventors: Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhiles Kumar, Jay Jayasimha, Jose A. Vargas
  • Publication number: 20090024715
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: September 23, 2008
    Publication date: January 22, 2009
    Inventors: Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhiles Kumar, Jay Jayasimha, Jose A. Vargas
  • Publication number: 20060184480
    Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
    Type: Application
    Filed: December 13, 2004
    Publication date: August 17, 2006
    Inventors: Mani Ayyar, Eric Delano, Ioannis Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose Vargas