Abstract: Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.

Abstract: A bicycle carrier has a frame mountable to a vehicle and defining a pair of spaced apart support arms for supporting one or more bicycles. The support arms are provided with positioning guides, which may take the form of spaced circumferential ridges and troughs extending along the support arms. The ridges and troughs may be formed by a ribbed sleeve mounted on the support arms. At least one cradle is mounted on each support arm for receiving and releasable holding a selected tube or tubes of a bicycle frame. Each cradle has an opening through which the support arm extends and a tab projects partially into the opening. The tabs are configured to be received and to ride within selected ones of the troughs of the support arms for rotatably positioning the cradles at desired positions along their support arms. A channel extends along the support arms interrupting the ridges.