Abstract: Aspects of the invention may include a method updating a color look-up table (CLUT) for a next line of graphics before a current line of graphics has been completely read out of a graphics FIFO and assigned color pixel values. The method may include the step of formatting or arranging the CLUT into a plurality of sub-CLUTs. Each one of the sub-CLUTs may include pixel color values for each one of a plurality of pixels which may include a line of the graphics image data. Pixel color values may be read from within a first selected sub-CLUT, the first selected sub-CLUT comprising pixel color values for a first line of the graphics image data. The read pixel color value may be applied to the current first line of the graphics image data. While the read pixel color value is being applied to the current first line, pixel color values for a second selected sub-CLUT may be updated. The second selected sub-CLUT may include color pixel values for a second line of the graphics image data.

Abstract: Aspects of the invention may include a method updating a color look-up table (CLUT) for a next line of graphics before a current line of graphics has been completely read out of a graphics FIFO and assigned color pixel values. The method may include the step of formatting or arranging the CLUT into a plurality of sub-CLUTs. Each one of the sub-CLUTs may include pixel color values for each one of a plurality of pixels which may include a line of the graphics image data. Pixel color values may be read from within a first selected sub-CLUT, the first selected sub-CLUT comprising pixel color values for a first line of the graphics image data. The read pixel color value may be applied to the current first line of the graphics image data. While the read pixel color value is being applied to the current first line, pixel color values for a second selected sub-CLUT may be updated. The second selected sub-CLUT may include color pixel values for a second line of the graphics image data.

Abstract: Aspects of the invention may include a method updating a color look-up table (CLUT) for a next line of graphics before a current line of graphics has been completely read out of a graphics FIFO and assigned color pixel values. The method may include the step of formatting or arranging the CLUT into a plurality of sub-CLUTs. Each one of the sub-CLUTs may include pixel color values for each one of a plurality of pixels which may include a line of the graphics image data. Pixel color values may be read from within a first selected sub-CLUT, the first selected sub-CLUT comprising pixel color values for a first line of the graphics image data. The read pixel color value may be applied to the current first line of the graphics image data. While the read pixel color value is being applied to the current first line, pixel color values for a second selected sub-CLUT may be updated. The second selected sub-CLUT may include color pixel values for a second line of the graphics image data.

Abstract: A system in accordance with the invention provides a chipset for use generally in a PC-type system and that includes a plurality of programmable I/O (PIO) pins. Each of the PIO pins can be programmed to carry signals in accordance with any function in a function pool. In one embodiment, the number of PIO pins total 32 and the number of functions total 70. Such programmability allows a single-chip chipset to be vendor platform-generic while simultaneously minimizing pin count.

Abstract: A system and method in accordance with the invention allows the emulation of a DMA transfer between a device such as a CD-ROM which is incapable of a bus-mastering mode of operation (e.g., a DMA transfer) and a memory. Following receipt of an interrupt request, a system in accordance with the invention generates an I/O access cycle to the device, retrieves data and stores the data in a buffer. Following data retrieval, the system transfers the data to host memory. Once data is transferred to host memory, an interrupt is generated to the host processor. Thus, host processor resources are not required to perform a data transfer with devices unable to become bus-masters.