Patents by Inventor Jay M. Gambetta

Jay M. Gambetta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200293935
    Abstract: According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an extrapolation component that extrapolates a system parameter of a parameter set to determine a starting parameter value of a variational circuit. The computer executable components can further comprise a variational component that determines a system parameter value of the parameter set based on the starting parameter value.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Inventors: Don Greenberg, Marco Pistoia, Ivano Tavernelli, Jay M. Gambetta
  • Publication number: 20200285986
    Abstract: A method for validation and runtime estimation of a quantum algorithm includes receiving a quantum algorithm and simulating the quantum algorithm, the quantum algorithm forming a set of quantum gates. The method further includes analyzing a first set of parameters of the set of quantum gates and analyzing a second set of parameters of a set of qubits performing the set of quantum gates. The method further includes transforming, in response to determining at least one of the first set of parameters or the second set of parameters meets an acceptability criterion, the quantum algorithm into a second set of quantum gates.
    Type: Application
    Filed: March 9, 2019
    Publication date: September 10, 2020
    Applicant: International Business Machines Corporation
    Inventors: Ali Javadiabhari, Jay M. Gambetta, Ismael Faro Sertage, Paul Nation
  • Publication number: 20200285947
    Abstract: Implementing a hybrid classical-quantum neural network includes constructing, by at least a first processor, a neural network for classification of input data. The neural network includes a plurality of neural network components. The at least a first processor initiates training of the neural network using training data. The at least a first processor identifies one or more of the plurality of neural network components for replacement. A quantum processor constructs a quantum component corresponding to the one or more network components. The one or more identified neural network components of the neural network are replaced with the quantum component to construct a hybrid classical-quantum neural network.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 10, 2020
    Applicant: International Business Machines Corporation
    Inventors: John A. Gunnels, Antonio Corcoles-Gonzalez, Jay M. Gambetta, Lior Horesh, Paul Kristan Temme
  • Publication number: 20200272929
    Abstract: A quantum computing device including a first plurality of qubits having a first resonance frequency and a second qubit having a second resonance frequency, the second resonance frequency being different from the first resonance frequency; and a first tunable frequency bus configured to couple the first plurality of qubits to the second qubit.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 27, 2020
    Inventors: David C. Mckay, Jay M. Gambetta
  • Patent number: 10755193
    Abstract: One or more time correlations of noise within a quantum computing circuit of a quantum processor are determined. The quantum computing circuit includes one or more qubits. A coherence time for each qubit is determined, and one or more stretch factors are determined based upon the time correlations of the noise and the coherence times. A first loop is initialized that performs for each of the stretch factors: initializing the qubits to a ground state, executing the quantum computing circuit with a the stretch factor, performing one or more single-qubit post-rotations associated with one or more expectation values, measuring a state of each qubit to determine the one or more expectation values of interest, and resetting each qubit to the ground state. A mitigated estimate is determined for the expectation values based upon an extrapolation of the expectation values determined for each stretch factor.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Abhinav Kandala, Paul Kristan Temme, Jay M. Gambetta
  • Publication number: 20200234174
    Abstract: Techniques for performing cost function deformation in quantum approximate optimization are provided. The techniques include mapping a cost function associated with a combinatorial optimization problem to an optimization problem over allowed quantum states. A quantum Hamiltonian is constructed for the cost function, and a set of trial states are generated by a physical time evolution of the quantum hardware interspersed with control pulses. Aspects include measuring a quantum cost function for the trial states, determining a trial state resulting in optimal values, and deforming a Hamiltonian to find an optimal state and using the optimal state as a next starting state for a next optimization on a deformed Hamiltonian until an optimizer is determined with respect to a desired Hamiltonian.
    Type: Application
    Filed: April 6, 2020
    Publication date: July 23, 2020
    Inventors: Jay M. Gambetta, Antonio Mezzacapo, Ramis Movassagh, Paul K. Temme
  • Publication number: 20200218518
    Abstract: A method for quantum circuit compilation with quantum libraries includes receiving a set of quantum assembly language from a user, the quantum assembly language comprising reference to a quantum algorithm. In an embodiment, the method includes selecting a quantum device to execute the set of quantum assembly language. In an embodiment, the method includes selecting, responsive to the selected quantum device, an implementation of the quantum algorithm from a remote repository, the remote repository comprising a set of implementations of a set of quantum algorithms. In an embodiment, the method includes, compiling the quantum algorithm from the set of quantum assembly language. In an embodiment, the method includes executing, using the selected quantum device, the selected implementation of the quantum algorithm.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 9, 2020
    Applicant: International Business Machines Corporation
    Inventors: Jay M. Gambetta, Ismael Faro Sertage, Marco Pistoia
  • Publication number: 20200210879
    Abstract: Systems, computer-implemented methods, and computer program products to facilitate external port measurement of qubit port responses are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an analysis component that can analyze responses of a multi-mode readout device coupled to a qubit. The computer executable components can further comprise an assignment component that can assign a readout state of the qubit based on the responses. In some embodiments, the multi-mode readout device can be electrically coupled to at least one of the qubit or an environment of the qubit based on a defined electrical coupling value.
    Type: Application
    Filed: March 5, 2020
    Publication date: July 2, 2020
    Inventors: Paul Kristan Temme, Salvatore Bernardo Olivadese, Antonio Corcoles-Gonzalez, Jay M. Gambetta, Lev Samuel Bishop
  • Publication number: 20200202247
    Abstract: In an embodiment, a method includes measuring a first number of control qubits in a quantum algorithm, wherein a quantum circuit representation of the quantum algorithm includes a multiple-controlled-NOT gate. In an embodiment, a method includes measuring a second number of ancilla qubits in a quantum computer. In an embodiment, a method includes comparing the first number and the second number to determine an optimum compilation method for a quantum circuit. In an embodiment, a method includes compiling, in response to the comparison determining the second number is greater than one and less than the difference of the first number and 2, a quantum circuit from the quantum algorithm using a hybrid method.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 25, 2020
    Applicant: International Business Machines Corporation
    Inventors: Shaohan Hu, RUDY RAYMOND HARRY PUTRA, Stephen Wood, Marco Pistoia, Jay M. Gambetta
  • Publication number: 20200193319
    Abstract: Techniques regarding quantum computation of molecular excited states are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an initialization component that can categorize a plurality of excited operators from a mapped qubit Hamiltonian into sectors based on a commutation property of the plurality of excited operators with a symmetry from the mapped qubit Hamiltonian. The computer executable components can also comprise a matrix component that can generate an equation of motion matrix from an excited operator from the plurality of excited operators based on the sectors categorized by the initialization component.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Inventors: Richard Chen, Antonio Mezzacapo, Marco Pistoia, Pauline Ollitrault, Ivano Tavernelli, Jay M. Gambetta
  • Publication number: 20200192993
    Abstract: A method includes detecting submission of a first quantum circuit for compilation, the first quantum circuit comprising a first set of quantum logic gates; generating a first gate index, the first gate index comprising an ordered table of a subset of the set of quantum logic gates, each quantum logic gate of the subset of quantum logic gates including a corresponding set of qubits acted on by the quantum logic gate; comparing the first gate index with a second gate index to determine a structural equality of the first quantum circuit and the second quantum circuit; and parameterizing, in response to determining a structural equality of the first quantum circuit and the second quantum circuit, a first set of parameters of a second set of quantum logic gates of the second quantum circuit with a second set of parameters of the first set of quantum logic gates.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 18, 2020
    Applicant: International Business Machines Corporation
    Inventors: Don Greenberg, Marco Pistoia, Ali Javadiabhari, Richard Chen, Jay M. Gambetta
  • Publication number: 20200183938
    Abstract: A method includes measuring an amplitude of a state of a quantum circuit, the amplitude corresponding to a first location in an object database. In the embodiment, the method includes executing, using a classical processor and a first memory, a verification operation, responsive to measuring the amplitude, to verify a target object in the first location. In the embodiment, the method includes re-measuring a second amplitude of a second state of the quantum circuit, the second amplitude having undergone a first plurality of amplitude amplifications, the second amplitude corresponding to a second location in the object database, the second location being verified as the target object, and wherein a total number of the first plurality of amplitude amplifications being less than a square root of a set of objects in the object database.
    Type: Application
    Filed: December 10, 2018
    Publication date: June 11, 2020
    Applicant: International Business Machines Corporation
    Inventors: Shaohan Hu, Rudy Raymond Harry Putra, Stephen Wood, Marco Pistoia, Jay M. Gambetta
  • Publication number: 20200175409
    Abstract: One or more time correlations of noise within a quantum computing circuit of a quantum processor are determined. The quantum computing circuit includes one or more qubits. A coherence time for each qubit is determined, and one or more stretch factors are determined based upon the time correlations of the noise and the coherence times. A first loop is initialized that performs for each of the stretch factors: initializing the qubits to a ground state, executing the quantum computing circuit with a the stretch factor, performing one or more single-qubit post-rotations associated with one or more expectation values, measuring a state of each qubit to determine the one or more expectation values of interest, and resetting each qubit to the ground state. A mitigated estimate is determined for the expectation values based upon an extrapolation of the expectation values determined for each stretch factor.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 4, 2020
    Applicant: International Business Machines Corporation
    Inventors: Abhinav Kandala, Paul Kristan Temme, Jay M. Gambetta
  • Publication number: 20200174879
    Abstract: A method includes executing a calibration operation on a set of qubits, in a first iteration, to produce a set of parameters, a first subset of the set of parameters corresponding to a first qubit of the set of qubits, and a second subset of the set of parameters corresponding to a second qubit of the set of qubits. In an embodiment, the method includes selecting the first qubit, responsive to a parameter of the first subset meeting an acceptability criterion. In an embodiment, the method includes forming a quantum gate, responsive to a second parameter of the second subset failing to meet a second acceptability criterion, using the first qubit and a third qubit.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: International Business Machines Corporation
    Inventors: Ali Javadiabhari, Jay M. Gambetta, ANDREW W. CROSS, David C. Mckay
  • Publication number: 20200167278
    Abstract: Techniques facilitating cached result use through quantum gate rewrite are provided. In one example, a computer-implemented method comprises converting, by a device operatively coupled to a processor, an input quantum circuit to a normalized form, resulting in a normalized quantum circuit; detecting, by the device, a match between the normalized quantum circuit and a cached quantum circuit among a set of cached quantum circuits; and providing, by the device, a cached run result of the cached quantum circuit based on the detecting.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 28, 2020
    Inventors: John A. Gunnels, Mark Wegman, David Kaminsky, Jay M. Gambetta, Ali Javadiabhari, David C. Mckay
  • Patent number: 10664762
    Abstract: Techniques for performing cost function deformation in quantum approximate optimization are provided. The techniques include mapping a cost function associated with a combinatorial optimization problem to an optimization problem over allowed quantum states. A quantum Hamiltonian is constructed for the cost function, and a set of trial states are generated by a physical time evolution of the quantum hardware interspersed with control pulses. Aspects include measuring a quantum cost function for the trial states, determining a trial state resulting in optimal values, and deforming a Hamiltonian to find an optimal state and using the optimal state as a next starting state for a next optimization on a deformed Hamiltonian until an optimizer is determined with respect to a desired Hamiltonian.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jay M. Gambetta, Antonio Mezzacapo, Ramis Movassagh, Paul K. Temme
  • Publication number: 20200161529
    Abstract: Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Jerry M. Chow, Easwar Magesan, Matthias Steffen, Jay M. Gambetta, Maika Takita
  • Publication number: 20200161732
    Abstract: Techniques for facilitating reduced thermal resistance attenuator on high-thermal conductivity substrates for quantum applications are provided. A device can comprise a substrate that provides a thermal conductivity level that is more than a defined thermal conductivity level. The device can also comprise one or more grooved transmission lines formed in the substrate. The one or more grooved transmission lines can comprise a powder substance. Further, the device can comprise one or more copper heat sinks formed in the substrate. The one or more copper heat sinks can provide a ground connection. Further, the one or more copper heat sinks can be formed adjacent to the one or more grooved transmission lines.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: Salvatore Bernardo Olivadese, Patryk Gumann, Jay M. Gambetta, Jerry M. Chow
  • Publication number: 20200162078
    Abstract: In an embodiment, a quantum circuit (circuit) includes a first qubit and a second qubit. In an embodiment, a quantum circuit includes a tunable microwave resonator, wherein a first applied magnetic flux is configured to tune the microwave resonator to a first frequency, the first frequency configured to activate an interaction between the first qubit and the second qubit, and wherein a second applied magnetic flux is configured to tune the microwave resonator to a second frequency, the second frequency configured to minimize an interaction between the first qubit and the second qubit.
    Type: Application
    Filed: September 13, 2019
    Publication date: May 21, 2020
    Applicant: International Business Machines Corporation
    Inventors: David C. Mckay, Jay M. Gambetta, Jerry M. CHOW
  • Publication number: 20200161531
    Abstract: Devices and methods that can facilitate vertical dispersive readout of qubits of a lattice surface code architecture are provided. According to an embodiment, a device can comprise a first substrate that can have a first side and a second side that can be opposite the first side. The first substrate can comprise a read pad that can be located on the first side and a readout resonator that can be located on the second side. The device can further comprise a second substrate that can be connected to the first substrate. The second substrate can comprise a qubit. In some embodiments, the device can further comprise a recess that can be located on the first side of the first substrate. The recess can comprise the read pad.
    Type: Application
    Filed: August 6, 2018
    Publication date: May 21, 2020
    Inventors: Salvatore Bernardo Olivadese, Patryk Gumann, Jay M. Gambetta