Patents by Inventor Jay P. Gupta

Jay P. Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210287901
    Abstract: A high-pressure dielectric film curing apparatus, such as a high-pressure batch furnace, is controlled to an elevated cure temperature and super-atmospheric pressure for the duration of the film curing time with the cure pressure achieved at least partially with a vapor of aqueous ammonia in fluid communication with the chamber. The cure temperature may vary, for example between 175° C., and 400° C., or more. The cure pressure may also vary as limited by the saturated water vapor pressure, for example between 100 PSIA and 300 PSIA, or more. The aqueous ammonia may be injected into the chamber or vaporized upstream of the chamber. One or more carrier and/or diluent gas (vapor) may be introduced into the chamber to adjust the partial pressure of ammonia vapor, water vapor, and the diluent.
    Type: Application
    Filed: September 30, 2016
    Publication date: September 16, 2021
    Applicant: Intel Corporation
    Inventors: Jonathan E. LEONARD, Aravind S. KILLAMPALLI, Chad BYERS, Jay P. GUPTA
  • Patent number: 10811251
    Abstract: A flowable chemical vapor deposition method including depositing a dielectric film precursor on a substrate in a flowable form; depositing an oligomerization agent on the substrate; forming a dielectric film from the dielectric film precursor; and curing the dielectric film under a pressure greater than atmospheric pressure. A method including depositing a dielectric film precursor as a liquid on a substrate in the presence of an oligomerization agent; treating the deposited dielectric film precursor to inhibit outgassing; and curing the dielectric film precursor to form a dielectric film. A method including delivering a dielectric film precursor as a vapor to a substrate including gap structures between device features; condensing the dielectric film precursor on the substrate to a liquid; flowing the liquid into the gap structures; and curing the dielectric film precursor under a pressure of 15 pounds per square inch gauge or greater.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 20, 2020
    Assignee: Intel Corporation
    Inventors: Jeanne L. Luce, Ebony L. Mays, Aravind S. Killampalli, Jay P. Gupta
  • Publication number: 20200312841
    Abstract: Transistor structures including a non-planar body that has an active portion comprising a semiconductor material of a first height that is variable, and an inactive portion comprising an oxide of the semiconductor material of a second variable height, complementary to the first height. Gate electrodes and source/drain terminals may be coupled through a transistor channel having any width that varies according to the first height. Oxidation of a semiconductor material may be selectively catalyzed to convert a desired portion of a non-planar body into the oxide of the semiconductor material. Oxidation may be enhanced through the application of a catalyst, such as one comprising metal and oxygen, for example.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 1, 2020
    Applicant: Intel Corporation
    Inventors: Willy RACHMADY, Cheng-Ying HUANG, Gilbert DEWEY, Jack KAVALIEROS, Caleb BARRETT, Jay P. GUPTA, Nishant GUPTA, Kaiwen HSU, Byungki JUNG, Aravind S. KILLAMPALLI, Justin RAILSBACK, Supanee SUKRITTANON, Prashant WADHWA
  • Patent number: 10573809
    Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Ravi Pillarisetty, Uday Shah, Elijah V. Karpov, Niloy Mukherjee, Pulkit Jain, Aravind S. Killampalli, Jay P. Gupta, James S. Clarke
  • Publication number: 20190181003
    Abstract: A flowable chemical vapor deposition method including depositing a dielectric film precursor on a substrate in a flowable form; depositing an oligomerization agent on the substrate; forming a dielectric film from the dielectric film precursor; and curing the dielectric film under a pressure greater than atmospheric pressure. A method including depositing a dielectric film precursor as a liquid on a substrate in the presence of an oligomerization agent; treating the deposited dielectric film precursor to inhibit outgassing; and curing the dielectric film precursor to form a dielectric film. A method including delivering a dielectric film precursor as a vapor to a substrate including gap structures between device features; condensing the dielectric film precursor on the substrate to a liquid; flowing the liquid into the gap structures; and curing the dielectric film precursor under a pressure of 15 pounds per square inch gauge or greater.
    Type: Application
    Filed: September 30, 2016
    Publication date: June 13, 2019
    Inventors: Jeanne L. LUCE, Ebony L. MAYS, Aravind S. KILLAMPALLI, Jay P. GUPTA
  • Publication number: 20190036020
    Abstract: An embodiment includes a memory comprising: a top electrode and a bottom electrode; an oxygen exchange layer (OEL) between the top and bottom electrodes; and an oxide layer between the OEL and the bottom electrode; wherein the oxide layer includes Deuterium and oxygen vacancies. Other embodiments are described herein.
    Type: Application
    Filed: March 31, 2016
    Publication date: January 31, 2019
    Inventors: Prashant Majhi, Ravi Pillarisetty, Uday Shah, Elijah V. Karpov, Niloy Mukherjee, Pulkit Jain, Aravind S. Killampalli, Jay P. Gupta, James S. Clarke