Patents by Inventor Jay P. Hoeflinger

Jay P. Hoeflinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7765526
    Abstract: Provided are a method, system, and article of manufacture, wherein a first application requests an operating system to monitor a memory address, and wherein the operating system generates a signal in response to an operation that affects the memory address. A second application receives the generated signal. The second application determines whether to forward the signal to the first application. The first application processes the signal, in response to the signal being forwarded by the second application.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: July 27, 2010
    Assignee: Intel Corporation
    Inventors: Chih-Ping Chen, Jeffrey V. Olivier, Jay P. Hoeflinger, Bevin R. Brett
  • Publication number: 20070288907
    Abstract: A method for debugging a program includes identifying a thread in an unsafe state during a breakpoint. The thread is allowed to continue execution until it reaches a safe state while preventing other threads from executing. According to one aspect of the invention, the thread is in the unsafe state when the thread is executing code to access sharable memory and the sharable memory is in transition. Other embodiments are described and claimed.
    Type: Application
    Filed: May 16, 2006
    Publication date: December 13, 2007
    Inventors: Jeffrey V. Olivier, Chih-Ping Chen, Jay P. Hoeflinger, Bevin R. Brett
  • Publication number: 20030135535
    Abstract: In some embodiments of the present invention, a parallel computer system provides a plurality of threads that execute code structures. A method and apparatus may be provided to copy data from one thread to another thread.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 17, 2003
    Inventors: Jay P. Hoeflinger, Sanjiv M. Shah, Paul M. Petersen, David K. Poulsen
  • Publication number: 20030126589
    Abstract: A method and apparatus for a reduction operation is described. A method may be utilized that includes receiving a first program unit in a parallel computing environment, the first program unit may include a reduction operation to be performed and translating the first program unit into a second program unit, the second program unit may associate the reduction operation with a set of one or more low-level instructions that may, in part, perform the reduction operation.
    Type: Application
    Filed: January 2, 2002
    Publication date: July 3, 2003
    Inventors: David K. Poulsen, Sanjiv M. Shah, Paul M. Petersen, Grant E. Haab, Jay P. Hoeflinger
  • Publication number: 20030088856
    Abstract: A method and apparatus for generating source code to return the memory address of a descriptor are described. In an embodiment, the method includes generating a function having an argument. The function is expressed in a high-level programming language. The function includes a set of one or more instructions that instruct a compiler unit to return a memory address of the argument as a result of the function. The method also includes generating a call to the function. The call is expressed in the high-level programming language. The call causes the compiler unit to pass a descriptor as the argument.
    Type: Application
    Filed: November 8, 2001
    Publication date: May 8, 2003
    Inventors: Jay P. Hoeflinger, Sanjiv M. Shah, David K. Poulsen