Patents by Inventor Jay Quirk

Jay Quirk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8279915
    Abstract: A system and method are provided for ordering tap setting modifications in a link partner using a plurality of voltage gain taps, while avoiding minimum and maximum limitations. Provided is a link partner (LP) transmitter having a parallel selectable voltage gain taps. The method sends messages from a network-connected local device (LD) directing the LP to generally change the gain setting of either the pre-tap or the post-tap, as follows. The gain setting of selected tap is changed in the desired direction of modification and then the center tap gain settings is maximally increased until a limit signal is received. If a selected tap increment is desired, the center tap is initially decremented more steps than the desired change in the selected tap.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: October 2, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Jay Quirk, Matthew Brown
  • Patent number: 8228975
    Abstract: A system and method are provided for zeroing pre and post-tap settings in a link partner using a plurality of voltage gain taps. The method provides a link partner (LP) transmitter. A network-connected local device (LD) selects an LP pre-tap or post-tap. The LD also chooses a zero gain setting for the selected LP tap. In a first iteration, the LD directs the LP to decrease the difference between the selected tap gain setting and the zero setting by 1 step. If a limit signal is not received by the LD, the LP is directed to maximally increase the center tap gain setting until a limit signal is received. The iterations are continued until a limit signal is returned in response to the LD directing the LP to decrease the difference between the selected tap gain setting and the zero setting.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: July 24, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventor: Jay Quirk
  • Patent number: 8223638
    Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: July 17, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Timothy P Walker, Jay Quirk
  • Publication number: 20100303142
    Abstract: A system and method are provided for zeroing pre and post-tap settings in a link partner using a plurality of voltage gain taps. The method provides a link partner (LP) transmitter. A network-connected local device (LD) selects an LP pre-tap or post-tap. The LD also chooses a zero gain setting for the selected LP tap. In a first iteration, the LD directs the LP to decrease the difference between the selected tap gain setting and the zero setting by 1 step. If a limit signal is not received by the LD, the LP is directed to maximally increase the center tap gain setting until a limit signal is received. The iterations are continued until a limit signal is returned in response to the LD directing the LP to decrease the difference between the selected tap gain setting and the zero setting.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 2, 2010
    Inventor: Jay Quirk
  • Publication number: 20100260250
    Abstract: A system and method are provided for ordering tap setting modifications in a link partner using a plurality of voltage gain taps, while avoiding minimum and maximum limitations. Provided is a link partner (LP) transmitter having a parallel selectable voltage gain taps. The method sends messages from a network-connected local device (LD) directing the LP to generally change the gain setting of either the pre-tap or the post-tap, as follows. The gain setting of selected tap is changed in the desired direction of modification and then the center tap gain settings is maximally increased until a limit signal is received. If a selected tap increment is desired, the center tap is initially decremented more steps than the desired change in the selected tap.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 14, 2010
    Inventors: Jay Quirk, Matthew Brown
  • Publication number: 20090148161
    Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.
    Type: Application
    Filed: February 13, 2009
    Publication date: June 11, 2009
    Applicant: Applied Micro Circuits Corporation
    Inventors: Timothy P. Walker, Jay Quirk
  • Patent number: 7512150
    Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10 Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: March 31, 2009
    Assignee: Applied Micro Circuits Corporation
    Inventors: Timothy P. Walker, Jay Quirk
  • Publication number: 20070245166
    Abstract: A system and method are provided for periodically servicing a channel in a timer used for controlling events. The method services a channel in a fixed periodic cycle, and reads a first control word loaded in the channel to determine a timer operation. Then, a first data word in the channel is managed in response to the determined operation. In one aspect, a clock signal is supplied with a fixed period. Then, servicing the channel in a fixed periodic cycle includes: establishing a cycle having a first number of clock signals; and, servicing the channel for a second number of clock signals each cycle. If the timer includes a plurality of channels, then each channel is serially serviced in a single cycle.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 18, 2007
    Inventors: Brian Wilkie, Michael Wiles, Jay Quirk
  • Patent number: 7180914
    Abstract: A digital communications system that can asynchronously map/de-map digital signals from one clock domain to another, while reducing mapping jitter levels and permitting higher levels of integration. The digital communications system includes an asynchronous stuff bit insertion circuit, an asynchronous stuff bit removal circuit, and a communications network connected therebetween. The asynchronous stuff bit insertion circuit includes a first elastic store, a barrel shifter, and a stuffing circuit. The asynchronous stuff bit removal circuit includes a de-stuffing circuit, a second elastic store, and a frequency control path including a phase-locked loop having a variable divider circuit, the operation of which is controlled based on the presence/absence of stuff bits in the data provided to the de-stuffing circuit.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: February 20, 2007
    Assignee: Applied Micro Circuits Corporation
    Inventors: Timothy P. Walker, Jay Quirk, Sean Campeau
  • Publication number: 20040202198
    Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10 Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.
    Type: Application
    Filed: March 24, 2003
    Publication date: October 14, 2004
    Inventors: Timothy P. Walker, Jay Quirk
  • Publication number: 20040042474
    Abstract: A digital communications system that can asynchronously map/de-map digital signals from one clock domain to another, while reducing mapping jitter levels and permitting higher levels of integration. The digital communications system includes an asynchronous stuff bit insertion circuit, an asynchronous stuff bit removal circuit, and a communications network connected therebetween. The asynchronous stuff bit insertion circuit includes a first elastic store, a barrel shifter, and a stuffing circuit. The asynchronous stuff bit removal circuit includes a de-stuffing circuit, a second elastic store, and a frequency control path including a phase-locked loop having a variable divider circuit, the operation of which is controlled based on the presence/absence of stuff bits in the data provided to the de-stuffing circuit.
    Type: Application
    Filed: August 19, 2002
    Publication date: March 4, 2004
    Inventors: Timothy P. Walker, Jay Quirk, Sean Campeau