Patents by Inventor Jay Quirk
Jay Quirk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8279915Abstract: A system and method are provided for ordering tap setting modifications in a link partner using a plurality of voltage gain taps, while avoiding minimum and maximum limitations. Provided is a link partner (LP) transmitter having a parallel selectable voltage gain taps. The method sends messages from a network-connected local device (LD) directing the LP to generally change the gain setting of either the pre-tap or the post-tap, as follows. The gain setting of selected tap is changed in the desired direction of modification and then the center tap gain settings is maximally increased until a limit signal is received. If a selected tap increment is desired, the center tap is initially decremented more steps than the desired change in the selected tap.Type: GrantFiled: April 14, 2009Date of Patent: October 2, 2012Assignee: Applied Micro Circuits CorporationInventors: Jay Quirk, Matthew Brown
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Patent number: 8228975Abstract: A system and method are provided for zeroing pre and post-tap settings in a link partner using a plurality of voltage gain taps. The method provides a link partner (LP) transmitter. A network-connected local device (LD) selects an LP pre-tap or post-tap. The LD also chooses a zero gain setting for the selected LP tap. In a first iteration, the LD directs the LP to decrease the difference between the selected tap gain setting and the zero setting by 1 step. If a limit signal is not received by the LD, the LP is directed to maximally increase the center tap gain setting until a limit signal is received. The iterations are continued until a limit signal is returned in response to the LD directing the LP to decrease the difference between the selected tap gain setting and the zero setting.Type: GrantFiled: May 27, 2009Date of Patent: July 24, 2012Assignee: Applied Micro Circuits CorporationInventor: Jay Quirk
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Patent number: 8223638Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.Type: GrantFiled: February 13, 2009Date of Patent: July 17, 2012Assignee: Applied Micro Circuits CorporationInventors: Timothy P Walker, Jay Quirk
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Publication number: 20100303142Abstract: A system and method are provided for zeroing pre and post-tap settings in a link partner using a plurality of voltage gain taps. The method provides a link partner (LP) transmitter. A network-connected local device (LD) selects an LP pre-tap or post-tap. The LD also chooses a zero gain setting for the selected LP tap. In a first iteration, the LD directs the LP to decrease the difference between the selected tap gain setting and the zero setting by 1 step. If a limit signal is not received by the LD, the LP is directed to maximally increase the center tap gain setting until a limit signal is received. The iterations are continued until a limit signal is returned in response to the LD directing the LP to decrease the difference between the selected tap gain setting and the zero setting.Type: ApplicationFiled: May 27, 2009Publication date: December 2, 2010Inventor: Jay Quirk
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Publication number: 20100260250Abstract: A system and method are provided for ordering tap setting modifications in a link partner using a plurality of voltage gain taps, while avoiding minimum and maximum limitations. Provided is a link partner (LP) transmitter having a parallel selectable voltage gain taps. The method sends messages from a network-connected local device (LD) directing the LP to generally change the gain setting of either the pre-tap or the post-tap, as follows. The gain setting of selected tap is changed in the desired direction of modification and then the center tap gain settings is maximally increased until a limit signal is received. If a selected tap increment is desired, the center tap is initially decremented more steps than the desired change in the selected tap.Type: ApplicationFiled: April 14, 2009Publication date: October 14, 2010Inventors: Jay Quirk, Matthew Brown
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Publication number: 20090148161Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.Type: ApplicationFiled: February 13, 2009Publication date: June 11, 2009Applicant: Applied Micro Circuits CorporationInventors: Timothy P. Walker, Jay Quirk
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Patent number: 7512150Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10 Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.Type: GrantFiled: March 24, 2003Date of Patent: March 31, 2009Assignee: Applied Micro Circuits CorporationInventors: Timothy P. Walker, Jay Quirk
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Publication number: 20070245166Abstract: A system and method are provided for periodically servicing a channel in a timer used for controlling events. The method services a channel in a fixed periodic cycle, and reads a first control word loaded in the channel to determine a timer operation. Then, a first data word in the channel is managed in response to the determined operation. In one aspect, a clock signal is supplied with a fixed period. Then, servicing the channel in a fixed periodic cycle includes: establishing a cycle having a first number of clock signals; and, servicing the channel for a second number of clock signals each cycle. If the timer includes a plurality of channels, then each channel is serially serviced in a single cycle.Type: ApplicationFiled: April 12, 2006Publication date: October 18, 2007Inventors: Brian Wilkie, Michael Wiles, Jay Quirk
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Patent number: 7180914Abstract: A digital communications system that can asynchronously map/de-map digital signals from one clock domain to another, while reducing mapping jitter levels and permitting higher levels of integration. The digital communications system includes an asynchronous stuff bit insertion circuit, an asynchronous stuff bit removal circuit, and a communications network connected therebetween. The asynchronous stuff bit insertion circuit includes a first elastic store, a barrel shifter, and a stuffing circuit. The asynchronous stuff bit removal circuit includes a de-stuffing circuit, a second elastic store, and a frequency control path including a phase-locked loop having a variable divider circuit, the operation of which is controlled based on the presence/absence of stuff bits in the data provided to the de-stuffing circuit.Type: GrantFiled: August 19, 2002Date of Patent: February 20, 2007Assignee: Applied Micro Circuits CorporationInventors: Timothy P. Walker, Jay Quirk, Sean Campeau
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Publication number: 20040202198Abstract: A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10 Gbase-R interfaces. The system transports 10 GbE LAN data packets over the OTN network by performing decoding on the packets to recover the preamble and variable length data contained in each packet, removing the IPG between successive packets in the stream, encapsulating the packets including the respective preambles and data, and mapping the encapsulated packets to the overhead and payload areas of ODUk frames. The packets are then transported over the OTN network from the source device to the destination device.Type: ApplicationFiled: March 24, 2003Publication date: October 14, 2004Inventors: Timothy P. Walker, Jay Quirk
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Publication number: 20040042474Abstract: A digital communications system that can asynchronously map/de-map digital signals from one clock domain to another, while reducing mapping jitter levels and permitting higher levels of integration. The digital communications system includes an asynchronous stuff bit insertion circuit, an asynchronous stuff bit removal circuit, and a communications network connected therebetween. The asynchronous stuff bit insertion circuit includes a first elastic store, a barrel shifter, and a stuffing circuit. The asynchronous stuff bit removal circuit includes a de-stuffing circuit, a second elastic store, and a frequency control path including a phase-locked loop having a variable divider circuit, the operation of which is controlled based on the presence/absence of stuff bits in the data provided to the de-stuffing circuit.Type: ApplicationFiled: August 19, 2002Publication date: March 4, 2004Inventors: Timothy P. Walker, Jay Quirk, Sean Campeau