Abstract: An apparatus and method for converting a source signal at a first rate to a re-sampled signal at a second rate using an array of processors. A decoder decomposes the source signal into left and right source values and sends an aperture signal to a coefficient control unit upon decomposition completion. A transfer unit controllably receives and passes the left and right source values on to a re-sampler. The coefficient control unit calculates a polyphase offset based on the aperture signal and a clock signal. A coefficient server selectively passes coefficients to the re-sampler based on the polyphase offset. And the re-sampler generates the re-sampled signal based on the left and right source values and the coefficients.

Abstract: A processor to calculate a product-component having fewer digits than an entire product of a multiplication of a multiplicand and a multiplier. A memory holds at least one multiplicand-component having fewer digits than the multiplicand and at least one multiplier-component having fewer digits than the multiplier. A logic then calculates the product-component based on the multiplicand-components and the multiplier-components in the memory. Collectively, a plurality of the processors can calculate all of the product-components of the product.