Abstract: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with the target processor is found in a processor cache of the target processor. If it is determined that the memory address is found in a target processor's cache, the data will be directly written to that cache at the same time that the data is being provided to a location in main memory.

Abstract: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with the target processor is found in a processor cache of the target processor. If it is determined that the memory address is found in a target processor's cache, the data will be directly written to that cache at the same time that the data is being provided to a location in main memory.

Abstract: The invention is a replication method that requires only one copy of a packet entering a multiport switch to be transmitted from the input port, the method acquiring the deadlock avoidance advantages of virtual cut-through operation. The goal is achieved via a central buffer, with replication occurring during the read of the chunk out of the central buffer by the output ports.

Abstract: A quiesced and synchronous distributed data processing system includes a primary node, a secondary node and a switch between the primary and secondary nodes. The TOD for the primary node is set depending on the system. The invention sets the TOD for the switch based on the TOD of the primary node. The primary node then verifies the switch TOD. If verified, the TOD for the secondary node is set, based on the TOD of the primary node. Finally, the secondary node self-verifies its TOD.

Abstract: A quiesced and synchronous distributed data processing system includes a primary node, a secondary node and a switch between the primary and secondary nodes. The TOD for the primary node is set depending on the system. The invention sets the TOD for the switch based on the TOD of the primary node. The primary node then verifies the switch TOD. If verified, the TOD for the secondary node is set, based on the TOD of the primary node. Finally, the secondary node self-verifies its TOD.