Abstract: Techniques for controlling input/output (I/O) power usage are disclosed. In the illustrative embodiment, a power policy engine of a compute device monitors power usage, I/O data transfer rates, and temperature and determines when there should be a change in an I/O power setting. The I/O data transfer requires that the data be handled properly, causing the compute device to expend power on the I/O data transfer. The power policy engine may instruct a device driver, such as a driver of an I/O device, to change a data transfer rate of the I/O device, reducing the power the compute device spends handling I/O.

Abstract: An apparatus is provided that includes a processor, a memory controller coupled to the processor to provide access to a system memory, and an interface controller to communicate with an endpoint device. The interface controller is coupled to the processor and configured to access a register of the endpoint device, the register to be mapped into a memory space of the system, the register to store a service latency tolerance value of the endpoint device. The endpoint device has a service latency tolerance value for a first state and a service latency tolerance value for a second state. The service latency tolerance value for the first state is greater than the service latency tolerance value for the second state.

Abstract: An apparatus is provided that includes a transceiver to transmit and receive data between an upstream device and the apparatus, and further includes service latency reporting logic coupled to the transceiver to provide a service latency tolerance value of the apparatus to the upstream device, the service latency tolerance value corresponding to an activity state of the apparatus. The service latency tolerance value for an idle activity state can be greater than the service latency tolerance value for an active activity state.

Abstract: An apparatus is provided that includes a processor, a memory controller coupled to the processor to provide access to a system memory, and an interface controller to communicate with an endpoint device. The interface controller is coupled to the processor and configured to access a register of the endpoint device, the register to be mapped into a memory space of the system, the register to store a service latency tolerance value of the endpoint device. The endpoint device has a service latency tolerance value for a first state and a service latency tolerance value for a second state. The service latency tolerance value for the first state is greater than the service latency tolerance value for the second state.

Abstract: For one disclosed embodiment, data corresponding to an idle duration for one or more downstream devices may be received. Power may be managed based at least in part on the received data. Other embodiments are also disclosed.

Abstract: One particular example implementation may include an apparatus that includes logic, at least a portion of which is in hardware, the logic configured to: determine that a first device maintains a link to a platform in a selective suspend state; assign a first latency value to the first device; identify at least one user detectable artifact when a second device exits the selective suspend state; and assign, to the second device, a second latency value that is different from the first value.

Abstract: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

Abstract: One particular example implementation may include an apparatus that includes logic, at least a portion of which is in hardware, the logic configured to: determine that a first device maintains a link to a platform in a selective suspend state; assign a first latency value to the first device; identify at least one user detectable artifact when a second device exits the selective suspend state; and assign, to the second device, a second latency value that is different from the first value.

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract: For one disclosed embodiment, a transition from a first state to a second, different state for at least a portion of a downstream device may be identified. The first and second states may correspond to different levels relating to activity for at least a portion of the downstream device. Data corresponding to a service latency may be transmitted to an upstream device in response to the identified transition for one or more upstream devices to manage power based at least in part on the service latency. Other embodiments are also disclosed.

Abstract: A mobile station in a wireless network includes a roaming timer. The roaming timer is set based on various criteria, and when the roaming timer expires, an attempt to roam is performed.

Abstract: A method, apparatus, and system for coordinated link power management. Some embodiments of a method include receiving an exit latency for each of a group of link states for a link, with a device being coupled to an interconnect via the first link. A latency tolerance value is determined and communicated, and a platform latency is received. The method further provides for determining a link budget for the device, the link budget indicating an amount of time available for an exit from a link state for the device; and selecting one of the link states based at least in part on the link budget.

Abstract: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

Abstract: One particular example implementation may include an apparatus that includes logic, at least a portion of which is in hardware, the logic configured to: determine that a first device maintains a link to a platform in a selective suspend state; assign a first latency value to the first device; identify at least one user detectable artifact when a second device exits the selective suspend state; and assign, to the second device, a second latency value that is different from the first value.

Abstract: In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.

Abstract: Particular embodiments described herein can offer a method that includes receiving first link state information associated with a first device, determining, by a processor, an upward latency tolerance based, at least in part, on the first link state information, and providing the upward latency tolerance to a power management controller.

Abstract: A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described.

Abstract: For one disclosed embodiment, data corresponding to an idle duration for one or more downstream devices may be received. Power may be managed based at least in part on the received data. Other embodiments are also disclosed.

Abstract: For one disclosed embodiment, a transition from a first state to a second, different state for at least a portion of a downstream device may be identified. The first and second states may correspond to different levels relating to activity for at least a portion of the downstream device. Data corresponding to a service latency may be transmitted to an upstream device in response to the identified transition for one or more upstream devices to manage power based at least in part on the service latency. Other embodiments are also disclosed.

Abstract: Embodiments of a system for receiving power management guidelines from a first plurality of components of a system, and developing a power management policy to manage one or more of a second plurality of components of the system based at least in part on the received power management guidelines. Other embodiments are described.