Abstract: Techniques for isolating and repairing failures on a programmable circuit are provided. An error on programmable circuit may be caused by a defect on the chip. The error is located, and the circuit elements effected by the defect are isolated. By identifying operable circuit elements near the defect, the number of circuit elements that are adversely effected by the defected can be narrowed down. The failed circuit elements adversely effected by the defect are then shut down and cut off from the rest of the programmable circuit. The functionality performed by the failed circuit elements is transferred to an unused portion of the programmable circuit. The se techniques reduce the amount of circuit elements that need to be shut down as a result of a defect on a programmable circuit.

Abstract: Techniques for monitoring the performance of a programmable circuit and to provide an early warning of a potential failure are provided. A processor monitors the performance of components on a programmable circuit over time. The processor stores performance characteristics for the components in memory. If the performance characteristics for particular components fall outside tolerance ranges, these components may to fail to operate according to specifications. Once the performance characteristics for particular components are outside the tolerance ranges, the processor sends out an alert signal. The alert signal indicates the possibility that the performance of the programmable circuit may violate the specifications in the future. The processor may repair the programmable circuit by re-routing around the problem components.

Abstract: Method and apparatus for application specific testing of PLDs. The PLD has a number of resources, less than all of which are used for implementing a customer application. The method includes the following steps. The set of resources that is used for implementing the customer application is identified. A test is then performed only on the set and a test result is generated. Defective resources may be replaced. The PLD is identified as defective only if one of the resources associated with the customer application is defective. Such application specific testing allows the ability of the customer to perform in-system testing, the reduction of the time required for testing the PLD, and the testing of PLDs based on knowledge of the customer's application, among other advantages.

Abstract: Programmable circuits have a programmable interconnect structure that connects programmable circuit elements. Tests patterns can be automatically generated for the programmable circuit elements and interconnections on a programmable circuit. A connectivity graph represents programmable interconnections and functions as nodes. Tests routes are generated that connect the nodes in the connectivity graph between control points and observation points on the programmable circuit. The routes are grouped into configuration patterns that can be tested in one test cycle. Test vectors are then applied to the routes to determine if the interconnects and circuit functions are operable. Systems and methods of the present invention automatically create test patterns for a programmable circuit to reduce engineer time. The present invention also reduces test time and resources by increasing the number of interconnections and circuit elements tested in each configuration pattern.