Patents by Inventor Jayagopal Karuppampalayam

Jayagopal Karuppampalayam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bridge between a single channel high speed bus and a multiple channel low speed bus
    Publication number: 20060184710
    Abstract: An apparatus for enabling communication between components in a network device includes a network processor providing data signals based on a PLx format; a multiport I/O controller having an IX bus interface and a plurality of MAC layer interfaces; and a bridge for bi-directionally converting the streaming data from the network processor to the I/O controller.
    Type: Application
    Filed: February 17, 2005
    Publication date: August 17, 2006
    Applicant: Nokia Inc.
    Inventors: David Valdivia, Jayagopal Karuppampalayam, James Lappin
  • Bridge for enabling communication between a FIFO interface and a PL3 bus for a network processor and an I/O card
    Publication number: 20060004936
    Abstract: A bridge for converting a relatively high speed communication interfaces provided by a network processor into another type of relatively high speed interface that is supported by an I/O card in a network device. A proprietary high speed communication interface can be a first-in-first-out (FIFO) streaming data interface. The other type of high speed interface supported by an I/O card can be PL3, PL4, SPI 3, SPI 4, and the like. The network devices can include, routers, switches, firewalls, gateways, and the like. The bridge can be configured as an application specific integrated circuit (ASIC).
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Applicant: Nokia Inc.
    Inventors: Jayagopal Karuppampalayam, James Lappin, Adote Messavussu