Patents by Inventor Jayant Mangalampalli

Jayant Mangalampalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10185680
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: January 22, 2019
    Assignee: INTEL CORPORATION
    Inventors: Jayant Mangalampalli, Venkat R. Gokulrangan
  • Publication number: 20180101488
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Application
    Filed: October 16, 2017
    Publication date: April 12, 2018
    Applicant: Intel Corporation
    Inventors: JAYANT MANGALAMPALLI, VENKAT R. GOKULRANGAN
  • Patent number: 9792234
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: October 17, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jayant Mangalampalli, Venkat R. Gokulrangan
  • Patent number: 9673985
    Abstract: In an embodiment of the present invention, a processor includes content storage logic to parse digital content into portions and to cause each portion to be stored into a corresponding page of a memory. The processor also includes protection logic to receive a write instruction having a destination address within the memory, and if the destination address is associated with a memory location stores a portion of the digital content, erase the page associated with the memory location. If the destination address is associated with another memory location that does not store any of the digital content, the protection logic is to permit execution of the write instruction. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: June 6, 2017
    Assignee: Intel Corporation
    Inventors: Jayant Mangalampalli, Rajesh P. Banginwar
  • Publication number: 20170004100
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Application
    Filed: April 1, 2016
    Publication date: January 5, 2017
    Applicant: Intel Corporation
    Inventors: JAYANT MANGALAMPALLI, VENKAT R. GOKULRANGAN
  • Publication number: 20160285637
    Abstract: In an embodiment of the present invention, a processor includes content storage logic to parse digital content into portions and to cause each portion to be stored into a corresponding page of a memory. The processor also includes protection logic to receive a write instruction having a destination address within the memory, and if the destination address is associated with a memory location stores a portion of the digital content, erase the page associated with the memory location. If the destination address is associated with another memory location that does not store any of the digital content, the protection logic is to permit execution of the write instruction. Other embodiments are described and claimed.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 29, 2016
    Inventors: Jayant Mangalampalli, Rajesh P. Banginwar
  • Patent number: 9417654
    Abstract: Embodiments of a system and method for secure clock management in a mobile device, or user equipment, are generally described herein. A timer offset may be calculated between a first secure clock time and a first network time. A reset delta based on at least the timer offset may be obtained and a recovered secure clock time based on at least the reset delta may be generated. A one-time password may be generated based on at least the recovered secure clock time.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: August 16, 2016
    Assignee: Intel Corporation
    Inventors: Amol A. Kulkarni, Gyan Prakash, Jayant Mangalampalli, Vani Yalapalli
  • Patent number: 9411983
    Abstract: In an embodiment of the present invention, a processor includes content storage logic to parse digital content into portions and to cause each portion to be stored into a corresponding page of a memory. The processor also includes protection logic to receive a write instruction having a destination address within the memory, and if the destination address is associated with a memory location stores a portion of the digital content, erase the page associated with the memory location. If the destination address is associated with another memory location that does not store any of the digital content, the protection logic is to permit execution of the write instruction. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 9, 2016
    Assignee: Intel Corporation
    Inventors: Jayant Mangalampalli, Rajesh P. Banginwar
  • Patent number: 9311458
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: April 12, 2016
    Assignee: INTEL CORPORATION
    Inventors: Jayant Mangalampalli, Venkat R. Gokulrangan
  • Publication number: 20150378389
    Abstract: Embodiments of a system and method for secure clock management in a mobile device, or user equipment, are generally described herein. A timer offset may be calculated between a first secure clock time and a first network time. A reset delta based on at least the timer offset may be obtained and a recovered secure clock time based on at least the reset delta may be generated. A one-time password may be generated based on at least the recovered secure clock time.
    Type: Application
    Filed: March 13, 2013
    Publication date: December 31, 2015
    Inventors: Amol A. Kulkarni, Gyan Prakash, Jayant Mangalampalli, Vani Yalapalli
  • Publication number: 20140281584
    Abstract: In an embodiment of the present invention, a processor includes content storage logic to parse digital content into portions and to cause each portion to be stored into a corresponding page of a memory. The processor also includes protection logic to receive a write instruction having a destination address within the memory, and if the destination address is associated with a memory location stores a portion of the digital content, erase the page associated with the memory location. If the destination address is associated with another memory location that does not store any of the digital content, the protection logic is to permit execution of the write instruction. Other embodiments are described and claimed.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Jayant Mangalampalli, Rajesh P. Banginwar
  • Publication number: 20130283391
    Abstract: Examples are disclosed for establishing a secure destination address range responsive to initiation of a direct memory access (DMA) operation. The examples also include allowing decrypted content obtained as encrypted content from a source memory to be placed at a destination memory based on whether destination memory addresses for the destination memory fall within the secure destination address range.
    Type: Application
    Filed: December 21, 2011
    Publication date: October 24, 2013
    Inventors: Jayant Mangalampalli, Venkat R. Gokulrangan
  • Patent number: 8069228
    Abstract: Methods, systems, apparatuses and program products are disclosed for context sensitive selective control of usage of connection(s) to telecommunications networks, especially Internet and the like. Provision is made for allowing certain resource(s) to exploit Internet while disallowing other resource(s) from doing the same, and making the implementation hardened against attack or compromise. An exemplary implementation is to allow anti-malware products to update over Internet while preventing malware from interfering or using the same communications resource simultaneously. Previously developed implementations have shortcoming that are overcome by the present invention.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: November 29, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard Bramley, Jayant Mangalampalli
  • Publication number: 20100287290
    Abstract: Methods, systems, apparatuses and program products are disclosed for context sensitive selective control of usage of connection(s) to telecommunications networks, especially Internet and the like. Provision is made for allowing certain resource(s) to exploit Internet while disallowing other resource(s) from doing the same, and making the implementation hardened against attack or compromise. An exemplary implementation is to allow anti-malware products to update over Internet while preventing malware from interfering or using the same communications resource simultaneously. Previously developed implementations have shortcoming that are overcome by the present invention.
    Type: Application
    Filed: August 17, 2009
    Publication date: November 11, 2010
    Inventors: Richard Bramley, Jayant Mangalampalli