Patents by Inventor Jayant Mohan Daftardar

Jayant Mohan Daftardar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8380911
    Abstract: A computing system peripheral device compatible with the peripheral component interconnect express (PCI-E) protocol responds to a DL_DOWN command primitive by configuring a general-purpose input/output (GPIO) port into a known state without invoking a GPIO module reset. In addition, select resources are excluded from resources on the peripheral device that are issued a reset command. The select resources can include a GPIO module, a memory element and a PCI-E SERDES module. After the remaining reset resources have completed their individual initialization processes, the central processor core on the peripheral device is reset. The described response to the DL_DOWN command primitive avoids cache data loss, masks signal transitions on I/O ports and timing problems that prevent some peripheral devices from being recognized in a computer's basic input/output system (BIOS).
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: February 19, 2013
    Assignee: LSI Corporation
    Inventor: Jayant Mohan Daftardar
  • Patent number: 8332839
    Abstract: Embodiments of the invention include a method for modifying firmware settings within a data storage controller, such as a data storage controller used in a Redundant Array of Inexpensive Disks (RAID) storage array. The method includes extracting a sub-module from a firmware image stored in the controller, stripping off the sub-module's header, decompressing the remaining compressed image by replacing the stripped sub-module header and an extended image header in the compressed image with an extended header image that allows conventional decompression, and separating the decompressed image into its executable code and at least one settings group.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: December 11, 2012
    Assignee: LSI Corporation
    Inventor: Jayant Mohan Daftardar
  • Publication number: 20120066429
    Abstract: A computing system peripheral device compatible with the peripheral component interconnect express (PCI-E) protocol responds to a DL_DOWN command primitive by configuring a general-purpose input/output (GPIO) port into a known state without invoking a GPIO module reset. In addition, select resources are excluded from resources on the peripheral device that are issued a reset command. The select resources can include a GPIO module, a memory element and a PCI-E SERDES module. After the remaining reset resources have completed their individual initialization processes, the central processor core on the peripheral device is reset. The described response to the DL_DOWN command primitive avoids cache data loss, masks signal transitions on I/O ports and timing problems that prevent some peripheral devices from being recognized in a computer's basic input/output system (BIOS).
    Type: Application
    Filed: September 13, 2010
    Publication date: March 15, 2012
    Applicant: LSI CORPORATION
    Inventor: Jayant Mohan Daftardar
  • Patent number: 8032665
    Abstract: A controller coupled to a redundant array of inexpensive disks (RAID) includes a processor and a non-volatile memory element. The processor has an input/output port that is configurable in one of an open-drain driver configuration, a high-impedance driver configuration and a totem-pole driver configuration. The totem-pole driver configuration is capable of supplying sufficient current to operate a slave device coupled to the input/output port. Firmware stored in the non-volatile memory device dynamically adjusts the driver configuration to prevent negative voltage swings in a signal communicated via the input/output port.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: October 4, 2011
    Assignee: LSI Corporation
    Inventors: Jayant Mohan Daftardar, Justin R. McCollum
  • Publication number: 20100191871
    Abstract: A controller coupled to a redundant array of inexpensive disks (RAID) includes a processor and a non-volatile memory element. The processor has an input/output port that is configurable in one of an open-drain driver configuration, a high-impedance driver configuration and a totem-pole driver configuration. The totem-pole driver configuration is capable of supplying sufficient current to operate a slave device coupled to the input/output port. Firmware stored in the non-volatile memory device dynamically adjusts the driver configuration to prevent negative voltage swings in a signal communicated via the input/output port.
    Type: Application
    Filed: January 27, 2009
    Publication date: July 29, 2010
    Applicant: LSI Corporation
    Inventors: Jayant Mohan Daftardar, Justin R. McCollum
  • Publication number: 20100042984
    Abstract: Embodiments of the invention include a method for modifying firmware settings within a data storage controller, such as a data storage controller used in a Redundant Array of Inexpensive Disks (RAID) storage array. The method includes extracting a sub-module from a firmware image stored in the controller, stripping off the sub-module's header, decompressing the remaining compressed image by replacing the stripped sub-module header and an extended image header in the compressed image with an extended header image that allows conventional decompression, and separating the decompressed image into its executable code and at least one settings group.
    Type: Application
    Filed: August 15, 2008
    Publication date: February 18, 2010
    Applicant: LSI Corporation
    Inventor: Jayant Mohan Daftardar