Abstract: An integrated circuit is adapted for dual use in three different ways: 1) it is powered by either of two different low or high voltage sources; 2) it may be connected to the IC package voltage reference pin in two different ways, using either an on-chip internal resistor or an in-package external resistor to limit the voltage/current to the IC; 3) the ESD structures are used not only for their well-known circuit protection function, but also as a conductive path for the high voltage operating source.

Abstract: A flash electrically erasable and programmable read only memory (EEPROM) having a selective parallel sector erase capability (100) is disclosed. The flash EEPROM (100) includes a number of sectors (104-0 to 104-18), each of which receives an erase voltage (VCC) by way of a source switch circuit (112-0 to 112-18). The source switch circuits (112-0 to 112-18) are each enabled by logic values stored in corresponding tag registers (114-0 to 114-18). The logic values stored by the tag registers (114-0 to 114-18) can be established by the application of particular address values (A12 to A18). The logic values of the tag registers (114-0 to 114-18) can be simultaneously reset to the same value by the application of other address values (A9).