Abstract: Aspects of the present disclosure relate to waveform calculation using a hybrid evaluation and simulation approach. Using one or more processors, one or more first portions of a design that are capable of being evaluated using waveform propagation are identified. The identified one or more first portions of the design are evaluated using waveform propagation. One or more second portions of the design that are not capable of being evaluated using waveform propagation are identified. Operation of the one or more second portions of the design is simulated.

Abstract: Systems and methods for integrated circuit (IC) analysis using a multi-level data hierarchy implemented on a distributed compute and data infrastructure are described. An IC design may be represented using a set of storage areas, where each storage area may be stored in a contiguous block of storage and may correspond to a portion of the IC design. An analysis application may be executed on the IC design, where a subset of the set of storage areas that is used by the analysis application may be retrieved on-demand.

Abstract: The disclosure generally describes computer-implemented methods, software, and systems, including a method for generating executable components. One method includes identifying a user request to create a new function based pre-existing algorithms, the new function to be used in an application used by a user; providing a set of available algorithms from an algorithm library; receiving a selection by a user of an algorithm from the available algorithms; providing a set of available parameters associated with the selected algorithm; receiving an election by the user of one or more parameters from the set of available parameters; generating an executable component in response to receiving the selection of the algorithm and the election of the one or more parameters, the executable component performing the selected algorithm using at least the elected one or more parameters; and storing the executable component for subsequent execution in response to the requested new function.

Abstract: A method for determining power consumed by a circuit is described that includes identifying a redundant frame including one of a clock toggle or a data toggle that is not propagated to an output pin of the circuit and identifying a non-redundant frame comprising a clock toggle and a data toggle that are propagated to the output pin of the circuit. Further, the method includes determining an ideal power consumed by the circuit during the non-redundant frame and providing a feedback to the user, the feedback including the redundant frame, a source of the redundant frame, and the ideal power consumed by the circuit during the non-redundant frame.

Abstract: The disclosure generally describes computer-implemented methods, software, and systems, including a method for generating executable components. One method includes identifying a user request to create a new function based pre-existing algorithms, the new function to be used in an application used by a user; providing a set of available algorithms from an algorithm library; receiving a selection by a user of an algorithm from the available algorithms; providing a set of available parameters associated with the selected algorithm; receiving an election by the user of one or more parameters from the set of available parameters; generating an executable component in response to receiving the selection of the algorithm and the election of the one or more parameters, the executable component performing the selected algorithm using at least the elected one or more parameters; and storing the executable component for subsequent execution in response to the requested new function.

Abstract: A method and apparatus for providing a secure authentication process is described. In one embodiment, a method for a method for providing a secure authentication process includes monitoring login activity of at least one authentication process associated with a computer resource and analyzing the login activity to identify suspicious login activity associated with user credentials.

Abstract: A system and method for designing ICs, including the steps of: analyzing and optimizing a target IC design based on design-specific objectives; partitioning the optimized target IC design into pre-defined standard-cells from one or more libraries and creating design-specific cells specifically having unique functionality and characteristics not found amongst the standard-cells; identifying and determining a minimal subset of the standard-cells and design-specific cells, the interconnection of which represents the target IC design; generating the necessary views, including layout and characterizing of the design-specific cells included in a unique, minimal subset, wherein the IC design is subject to objectives and constraints of the target IC.

Abstract: A system and method for designing ICs, including the steps of: analyzing and optimizing a target IC design based on design-specific objectives; partitioning the optimized target IC design into pre-defined standard-cells from one or more libraries and creating design-specific cells specifically having unique functionality and characteristics not found amongst the standard-cells; identifying and determining a minimal subset of the standard-cells and design-specific cells, the interconnection of which represents the target IC design; generating the necessary views, including layout and characterizing of the design-specific cells included in a unique, minimal subset, wherein the IC design is subject to objectives and constraints of the target IC.