Patents by Inventor Jayasimha Swamy Prasad

Jayasimha Swamy Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DMOS transistor with trench schottky diode
    Patent number: 9780204
    Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: October 3, 2017
    Assignee: Micrel, Inc.
    Inventors: Jayasimha Swamy Prasad, Paul McKay Moore, David Raymond Zinn
  • DMOS TRANSISTOR WITH TRENCH SCHOTTKY DIODE
    Publication number: 20170133502
    Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.
    Type: Application
    Filed: November 16, 2016
    Publication date: May 11, 2017
    Inventors: Jayasimha Swamy Prasad, Paul McKay Moore, David Raymond Zinn
  • DMOS transistor with trench schottky diode
    Patent number: 9530880
    Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: December 27, 2016
    Assignee: Micrel, Inc.
    Inventors: Jayasimha Swamy Prasad, Paul McKay Moore, David Raymond Zinn
  • DMOS TRANSISTOR WITH TRENCH SCHOTTKY DIODE
    Publication number: 20160260831
    Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.
    Type: Application
    Filed: March 3, 2015
    Publication date: September 8, 2016
    Inventors: Jayasimha Swamy Prasad, Paul McKay Moore, David Raymond Zinn
  • Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
    Patent number: 6913981
    Abstract: Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielectric isolation layer overlying the base layer, and an emitter structure overlying the dielectric isolation layer and contacting the base layer through a central aperture in the dielectric layer. The transistor may be a heterojunction bipolar transistor with the base layer formed of a selectively grown silicon germanium alloy. A dielectric spacer may be formed adjacent the emitter structure and over a portion of the base layer.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: July 5, 2005
    Assignee: Micrel, Incorporated
    Inventors: Jay Albert Shideler, Jayasimha Swamy Prasad, Ronald Lloyd Schlupp, Robert William Bechdolt
  • Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
    Publication number: 20040043576
    Abstract: Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielectric isolation layer overlying the base layer, and an emitter structure overlying the dielectric isolation layer and contacting the base layer through a central aperture in the dielectric layer. The transistor may be a heterojunction bipolar transistor with the base layer formed of a selectively grown silicon germanium alloy. A dielectric spacer may be formed adjacent the emitter structure and over a portion of the base layer.
    Type: Application
    Filed: May 19, 2003
    Publication date: March 4, 2004
    Applicant: Micrel, Incorporated
    Inventors: Jay Albert Shideler, Jayasimha Swamy Prasad, Ronald Lloyd Schlupp, Robert William Bechdolt
  • Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
    Patent number: 6699765
    Abstract: Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielectric isolation layer overlying the base layer, and an emitter structure overlying the dielectric isolation layer and contacting the base layer through a central aperture in the dielectric layer. The transistor may be a heterojunction bipolar transistor with the base layer formed of a selectively grown silicon germanium alloy. A dielectric spacer may be formed adjacent the emitter structure and over a portion of the base layer.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: March 2, 2004
    Assignee: Micrel, Inc.
    Inventors: Jay Albert Shideler, Jayasimha Swamy Prasad, Ronald Lloyd Schlupp, Robert William Bechdolt