Patents by Inventor Jayavarapu Srinivasa RAO

Jayavarapu Srinivasa RAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11928581
    Abstract: A method of compressing kernels comprising detecting a plurality of replicated kernels. The plurality of replicated kernels comprise kernels. The method also comprises generating a composite kernel from the replicated kernels. The composite kernel comprises kernel data and meta data indicative of the rotations applied to the composite kernel data. The method also comprises storing a composite kernel.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: March 12, 2024
    Assignee: Arm Limited
    Inventors: Daren Croxford, Jayavarapu Srinivasa Rao, Sharjeel Saeed
  • Patent number: 11853873
    Abstract: A method of reducing kernel computations; the method comprising ordering a plurality of kernel channels. A first of the ordered kernel channels is then convolved with input data to produce a convolution output, and it is determined whether to convolve one or more subsequent kernel channels of the ordered kernel channels. Determining whether to convolve subsequent kernel channels comprises considering a potential contribution of at least one of the one or more subsequent kernel channels in combination with the convolution output.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: December 26, 2023
    Assignee: Arm Limited
    Inventors: Daren Croxford, Jayavarapu Srinivasa Rao
  • Publication number: 20230079975
    Abstract: A system-on-chip comprises processing circuitry to process input data to generate output data, and power management circuitry to control power management policy for at least a portion of the system-on-chip. The power management circuitry controls the power management policy depending on metadata indicative of a property of the input data to be processed by the processing circuitry.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Sharjeel SAEED, Daren CROXFORD, Rachel Jean TRIMBLE, Jayavarapu Srinivasa RAO, Sidhartha TANEJA
  • Patent number: 11423117
    Abstract: A computer implemented method for performing convolutions between subsets of an input data array and a kernel resulting in subsets of an output data array. The method may include receiving an input data array and using positional data indicating the position of elements of the input data array to determine subsets of the input data array which contains at least one non-zero value data element; performing convolutions between the subsets of the input data array containing at least one non-zero value data element and a kernel to produce output data array subsets; and combining the output data subsets with the positional data to generate output data indicative of a completed output data array.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: August 23, 2022
    Assignees: ARM LIMITED, APICAL LIMITED
    Inventors: Sharjeel Saeed, Daren Croxford, Davide Marani, Jayavarapu Srinivasa Rao
  • Publication number: 20220253220
    Abstract: A method of compressing data for transfer between a local storage of a processor and an external storage. The data is formed in an array of three or more dimensions and the method comprises sequentially reading data stored in the local storage to a compressor in units of data. Each unit has a predetermined unit size corresponding to an integer number of a tile size. At an extremity of the array, a partial unit of data is read in a case that the array size is not an integer multiple of the unit size. The partial unit of data is filled at the compressor and the filled data is compressed on a tile-by-tile basis to form compressed data. The compressed data associated with the unit of data is transferred to the external storage.
    Type: Application
    Filed: February 10, 2022
    Publication date: August 11, 2022
    Inventors: Jayavarapu Srinivasa RAO, Davide MARANI, Abhiram ANANTHARAMU
  • Publication number: 20220129321
    Abstract: An information processing apparatus is described for processing a workload. The information processing apparatus comprises a processor and a memory element connected to the processor via a data link. In advance of processing a workload, the information processing apparatus estimates an access time required to transfer an amount of the workload that is to be transferred from the external memory element to the processor, and estimates a processing time for the processor to process the workload. A processing rate characteristic of the processor and/or a data transfer rate between the memory and the processor is set in dependence upon the estimated processing time and estimated access time. Methods for varying a quality of service (QoS) value of requests to the external memory element are also described.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Inventors: Daren CROXFORD, Sharjeel SAEED, Jayavarapu Srinivasa RAO, Aaron DEBATTISTA
  • Patent number: 11205077
    Abstract: A method is described for operating on a frame of a video to generate a feature map of a neural network. The method determines if a block of the frame is an inter block or an intra block, and performs an inter block process in the event that the block is an inter block and/or an intra block process in the event that the block is an intra block. The inter block process determines a measure of differences between the block of the frame and a reference block of a reference frame of the video, and performs either a first process or a second process based on the measure to generate a segment of the feature map. The intra block process determines a measure of flatness of the block of the frame, and performs either a third process or a fourth process based on the measure to generate a segment of the feature map.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: December 21, 2021
    Assignee: Arm Limited
    Inventors: Jayavarapu Srinivasa Rao, Daren Croxford, Dominic Hugo Symes
  • Publication number: 20210374422
    Abstract: A method is described for operating on a frame of a video to generate a feature map of a neural network. The method determines if a block of the frame is an inter block or an intra block, and performs an inter block process in the event that the block is an inter block and/or an intra block process in the event that the block is an intra block. The inter block process determines a measure of differences between the block of the frame and a reference block of a reference frame of the video, and performs either a first process or a second process based on the measure to generate a segment of the feature map. The intra block process determines a measure of flatness of the block of the frame, and performs either a third process or a fourth process based on the measure to generate a segment of the feature map.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Jayavarapu Srinivasa RAO, Daren CROXFORD, Dominic Hugo SYMES
  • Patent number: 11164032
    Abstract: A computer-implemented method of performing a convolution between an input data array and a kernel to generate an output data array includes decomposing the kernel into a plurality of sub-kernels each having a respective position relative to the kernel and respective in-plane dimensions less than or equal to a target kernel dimension, and for each of the plurality sub-kernels: determining a respective portion of the input data array on the basis of the respective in-plane dimensions of the sub-kernel and the respective position of the sub-kernel relative to the kernel; retrieving the respective portion of the input data array; and performing a convolution between the retrieved respective portion of the input data array and the sub-kernel to generate a respective intermediate data array. The method further includes summing the generated intermediate data arrays to generate at least a portion of the output data array.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: November 2, 2021
    Assignee: Arm Limited
    Inventor: Jayavarapu Srinivasa Rao
  • Publication number: 20210224629
    Abstract: A computer-implemented method, performed in a neural processing system comprising control processor circuitry and arithmetic logic circuitry, of performing a convolution between an input feature map (IFM) and convolutional filter data, resulting in an output feature map (OFM). The method includes, obtaining in the control processor circuitry, dimensional characteristic parameters relating to dimensions of input work batch data arrays and positional characteristic parameters relating to positions of feature map content within the input work batches. The method also includes, in the arithmetic logic circuitry, performing convolutions between the input work batches, generated from the IFM based on the dimensional characteristic parameters and the positional characteristic parameters, and work batch filter data arrays corresponding to the filter to produce a plurality of output work batch data arrays. The plurality of output work batches are combined to generate an OFM.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 22, 2021
    Inventors: Suraj SUDHIR, Jayavarapu Srinivasa RAO, Rune HOLM
  • Publication number: 20210224630
    Abstract: A computer-implemented method, performed in a neural processing system comprising control processor circuitry and arithmetic logic circuitry, of performing a convolution between an input feature map (IFM) and convolutional filter data, resulting in an output feature map (OFM). The method includes, obtaining in the control processor circuitry, dimensional characteristic parameters relating to dimensions of input work batch data arrays and positional characteristic parameters relating to positions of feature map content within the input work batches. The method also includes, in the arithmetic logic circuitry, performing convolutions between the input work batches, generated from the IFM based on the dimensional characteristic parameters and the positional characteristic parameters, and work batch filter data arrays corresponding to the filter to produce a plurality of output work batch data arrays. The plurality of output work batches are combined to generate an OFM.
    Type: Application
    Filed: February 21, 2020
    Publication date: July 22, 2021
    Inventors: Suraj SUDHIR, Jayavarapu Srinivasa RAO, Rune HOLM
  • Patent number: 10984758
    Abstract: A display controller configured to process first data representative of a first portion of an input frame to process the first portion of the input frame using an image enhancement scheme, thereby generating first enhanced data. The first enhanced data is sent to a display interface for sending to a display device. Subsequently, further data is sent to the display interface for sending to the display device. The further data is associated with at least one further portion of the input frame, each of which is different from the first portion of the input frame. The display controller is further configured to send instructions to the display interface for sending to the display device to instruct the display device to display an output frame comprising a first portion represented by the first enhanced data and at least one further portion represented by the further data.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: April 20, 2021
    Assignee: Apical Limited and Arm Limited
    Inventors: Daren Croxford, Jayavarapu Srinivasa Rao
  • Publication number: 20210064688
    Abstract: A computer implemented method for performing convolutions between subsets of an input data array and a kernel resulting in subsets of an output data array. The method may include receiving an input data array and using positional data indicating the position of elements of the input data array to determine subsets of the input data array which contains at least one non-zero value data element; performing convolutions between the subsets of the input data array containing at least one non-zero value data element and a kernel to produce output data array subsets; and combining the output data subsets with the positional data to generate output data indicative of a completed output data array.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 4, 2021
    Inventors: Sharjeel SAEED, Daren CROXFORD, Davide MARANI, Jayavarapu Srinivasa RAO
  • Patent number: 10916040
    Abstract: Examples of the present disclosure relate to methods for processing image data. In one such example, first data representing a rendered image is received. In some cases, second data useable to identify at least one target region of the rendered image is received, the at least one target region being associated with a gaze direction of a viewer. A first portion of the first data is processed in accordance with a first data reduction rate to derive first processed data, the first portion representing the at least one target region. A second portion of the first data is processed in accordance with a second data reduction rate, different from the first data reduction rate. The second portion represents a further region of the rendered image, different from the at least one target image. At least the first processed data is outputted.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: February 9, 2021
    Assignees: Apical Ltd., Arm Limited
    Inventors: Daren Croxford, Roberto Lopez Mendez, Sean Tristram LeGuay Ellis, Jayavarapu Srinivasa Rao
  • Patent number: 10896536
    Abstract: A method of operating a data processing system is disclosed for a data processing system that comprises a display and a display controller operable to provide to the display data in respect of output surfaces to be displayed. The method comprises, when an output surface is to be displayed, the display controller providing to the display data in respect of the output surface in the form of image data and image modification data, and the display using the image data and the image modification data when producing an output surface for display.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: January 19, 2021
    Assignee: Arm Limited
    Inventors: Daren Croxford, Sharjeel Saeed, Jayavarapu Srinivasa Rao, Ozgur Ozkurt, Dominic Hugo Symes
  • Publication number: 20210012141
    Abstract: A computer-implemented method of performing a convolution between an input data array and a kernel to generate an output data array includes decomposing the kernel into a plurality of sub-kernels each having a respective position relative to the kernel and respective in-plane dimensions less than or equal to a target kernel dimension, and for each of the plurality sub-kernels: determining a respective portion of the input data array on the basis of the respective in-plane dimensions of the sub-kernel and the respective position of the sub-kernel relative to the kernel; retrieving the respective portion of the input data array; and performing a convolution between the retrieved respective portion of the input data array and the sub-kernel to generate a respective intermediate data array. The method further includes summing the generated intermediate data arrays to generate at least a portion of the output data array.
    Type: Application
    Filed: July 11, 2019
    Publication date: January 14, 2021
    Inventor: Jayavarapu Srinivasa RAO
  • Patent number: 10672367
    Abstract: A method of operating a data processing system is disclosed for a data processing system that comprises a display and a display controller. The method comprises the display controller providing to the display data for an output surface to be displayed, storing the data in a memory of the display, and the display reading the data from the memory and displaying the output surface. The method further comprises the display controller indicating to the display a particular memory address of the memory, and the display using the indication to control the reading of data from the memory. The display controller may provide to the display image data for one or more sub-regions of the output surface that were not present in a previous version of the output surface.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: June 2, 2020
    Assignee: Arm Limited
    Inventors: Sharjeel Saeed, Jayavarapu Srinivasa Rao, Ozgur Ozkurt, Daren Croxford
  • Publication number: 20200110995
    Abstract: A method of reducing kernel computations; the method comprising ordering a plurality of kernel channels. A first of the ordered kernel channels is then convolved with input data to produce a convolution output, and it is determined whether to convolve one or more subsequent kernel channels of the ordered kernel channels. Determining whether to convolve subsequent kernel channels comprises considering a potential contribution of at least one of the one or more subsequent kernel channels in combination with the convolution output.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Daren CROXFORD, Jayavarapu SRINIVASA RAO
  • Publication number: 20200090032
    Abstract: A method of compressing kernels comprising detecting a plurality of replicated kernels. The plurality of replicated kernels comprise kernels. The method also comprises generating a composite kernel from the replicated kernels. The composite kernel comprises kernel data and meta data indicative of the rotations applied to the composite kernel data. The method also comprises storing a composite kernel.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 19, 2020
    Inventors: Daren CROXFORD, Jayavarapu Srinivasa RAO, Sharjeel SAEED
  • Publication number: 20200034993
    Abstract: Examples of the present disclosure relate to methods for processing image data. In one such example, first data representing a rendered image is received. In some cases, second data useable to identify at least one target region of the rendered image is received, the at least one target region being associated with a gaze direction of a viewer. A first portion of the first data is processed in accordance with a first data reduction rate to derive first processed data, the first portion representing the at least one target region. A second portion of the first data is processed in accordance with a second data reduction rate, different from the first data reduction rate. The second portion represents a further region of the rendered image, different from the at least one target image. At least the first processed data is outputted.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 30, 2020
    Inventors: Daren CROXFORD, Roberto LOPEZ MENDEZ, Sean Tristram LeGuay ELLIS, Jayavarapu Srinivasa RAO