Abstract: A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.

Abstract: A module is electrically connectable to a computer system. The module includes at least one multilayer structure having a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the at least one multilayer structure. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is in electrical communication with the electrical contacts. The module further includes a second printed circuit board coupled to the at least one multilayer structure. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is in electrical communication with the electrical contacts. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.

Abstract: A cellular telephone includes a multimedia card (MMC) having storage capacity for computer data files. An engagement device for a data transfer interface (e.g., a universal serial bus (USB) interface) is permanently mounted to the housing of the cellular telephone. The engagement device is movable from a nonobstructing home position to an extended position to allow a user to plug the cellular telephone directly into a computer or other data processing system without requiring addition cables or connectors. The MMC is configured and controlled by a microcontroller or other control device to emulate a solid-state drive such that a user has the full capabilities of a solid-state drive and a cellular telephone in a single convenient housing.

Abstract: A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is configured to be electrically coupled to a memory controller of a computer system. The circuit selectively isolates one or more of the loads of the memory devices from the computer system. The circuit comprises logic which translates between a system memory domain of the computer system and a physical memory domain of the memory module.

Abstract: An arrangement of ball grid array packages includes a flexible circuit board having first and second opposed surfaces defining a central portion to which first and second side portions are flexibly attached. A first package has a first array of solder ball pins attached to the first surface of the circuit board in the central portion thereof. A second package has first and second opposed surfaces and a second array of solder ball pins on the first surface that are attached to the second surface of the circuit board in the central portion thereof. A third array of solder ball pins is provided on each of the side portions on the first surface thereof. The side portions are folded underneath the second package and attached to the second surface thereof, whereby the third array of solder ball pins is oriented for attachment to a motherboard.

Abstract: A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.

Abstract: A module is electrically connectable to a computer system. The module includes a frame having an edge connector with a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the frame. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is electrically coupled to the electrical contacts of the edge connector. The module further includes a second printed circuit board coupled to the frame. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is electrically coupled to the electrical contacts of the edge connector. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.

Abstract: A memory module comprises a plurality of memory components. Each memory component has a first bit width. The plurality of memory components are configured as one or more pairs of memory components. Each pair of memory components simulates a single virtual memory component having a second bit width which is twice the first bit width.

Abstract: A memory module includes a plurality of memory components mounted on a printed circuit board, and a plurality of passive components embedded within the board directly underneath the memory components to minimize the space occupied by the passive components and the lengths of the required conductive traces. The passive components and the memory components are connected by conductor-filled vias between the contacts of the embedded components and the memory components mounted above them on the board surface. The passive components may be thick film resistors, either series damping resistors or differential damping resistors. By embedding the resistors directly beneath the memory components, there is enough space on the board to provide a set of termination resistors for each of the several memory components on the board, thereby eliminating the need for a single resistor to be shared by two or more memory components, resulting in more precise output signals.

Abstract: A load simulator is configured to simulate a load characteristic of at least one memory device. The memory device has a plurality of device contacts configured to be electrically coupled to a plurality of module contacts on a printed circuit board of a memory module. Each device contact has a load capacitance. The load simulator includes a package having a first face and a plurality of simulator contacts on the first face. The simulator contacts are configured to be electrically coupled to the module contacts. Each simulator contact has a simulator capacitance approximately equal to the load capacitance of a corresponding device contact of the at least one memory device.

Abstract: A memory module includes a printed circuit board and a plurality of memory devices arranged in a plurality of ranks on the printed circuit board. The plurality of ranks includes a first subset having at least one rank and a second subset having at least one rank. The memory module further includes a first serial-presence-detect (SPD) device on the printed circuit board and a second SPD device on the printed circuit board. The first SPD device includes data that characterizes the first subset. The second SPD device includes data that characterizes the second subset.

Abstract: Abstract of the Disclosure Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of one-Gigabyte, two-Gigabyte, and four-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in the first row on a first lateral portion of the printed circuit board and in the second row on the first lateral portion are connected to a first addressing register with two register integrated circuits. The integrated circuits in the first row on the second lateral portion and in the second row on the second lateral portion are connected to a second addressing register with two register integrated circuits. Each addressing register processes a non-contiguous subset of the bits in each data word.