Patents by Inventor Jayesh Hari Joshi

Jayesh Hari Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12561206
    Abstract: Stability testing for memory overclocking is described. In accordance with the described techniques, operation of a memory with overclocked memory settings is testing during a boot up process of a computing device. Test results based on the testing are exposed via a user interface. The test results predict a stability of the memory over a subsequent time period if the memory is configured to operate with the overclocked memory settings.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: February 24, 2026
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alicia Wen Ju Yurie Leong, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Grant Evan Ley, Anil Harwani, Amitabh Mehra, Jayesh Hari Joshi
  • Patent number: 12422990
    Abstract: Extended training for memory is described. In accordance with the described techniques, a training request to train a memory with extended training is received. The extended training corresponds to a longer amount of time than a default training. The extended training of the memory is performed using a set of target memory settings. In one or more implementations, the extended training is performed during a boot up phase of the computing device.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: September 23, 2025
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alicia Wen Ju Yurie Leong, Jayesh Hari Joshi, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Amitabh Mehra, Grant Evan Ley
  • Patent number: 12399621
    Abstract: Automated memory overclocking is described. In accordance with the described techniques, one or more sets of overclocked memory settings of a memory are automatically selected for performance testing and stability testing of the memory. The one or more sets of the overclocked memory settings are tested for performance of the memory and a performance indication is output for each of the one or more sets of the overclocked memory settings. The one or more sets of the overclocked memory settings are tested for stability of the memory and a stability indication is output for each of the one or more sets of the overclocked memory settings. One of the one or more sets of the overclocked memory settings are selected as optimized overclocked memory settings for the memory.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: August 26, 2025
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jayesh Hari Joshi, Alicia Wen Ju Yurie Leong, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Grant Evan Ley, Amitabh Mehra, Anil Harwani
  • Publication number: 20240220108
    Abstract: Automated memory overclocking is described. In accordance with the described techniques, one or more sets of overclocked memory settings of a memory are automatically selected for performance testing and stability testing of the memory. The one or more sets of the overclocked memory settings are tested for performance of the memory and a performance indication is output for each of the one or more sets of the overclocked memory settings. The one or more sets of the overclocked memory settings are tested for stability of the memory and a stability indication is output for each of the one or more sets of the overclocked memory settings. One of the one or more sets of the overclocked memory settings are selected as optimized overclocked memory settings for the memory.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 4, 2024
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Jayesh Hari Joshi, Alicia Wen Ju Yurie Leong, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Grant Evan Ley, Amitabh Mehra, Anil Harwani
  • Publication number: 20240220208
    Abstract: Induced signal marginality for random number generation is described. In accordance with the described techniques, a pseudorandom number is transmitted across an interface while the interface is operated with settings configured to cause instability in the interface. A random number is received as an output of the interface. The settings configured to cause instability in the interface include overclocked settings of interface operating parameters.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 4, 2024
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Jerry Anton Ahrens, William Robert Alverson, Amitabh Mehra, Grant Evan Ley, Joshua Taylor Knight, Anil Harwani, Jayesh Hari Joshi
  • Publication number: 20240211142
    Abstract: Extended training for memory is described. In accordance with the described techniques, a training request to train a memory with extended training is received. The extended training corresponds to a longer amount of time than a default training. The extended training of the memory is performed using a set of target memory settings. In one or more implementations, the extended training is performed during a boot up phase of the computing device.
    Type: Application
    Filed: December 27, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Alicia Wen Ju Yurie Leong, Jayesh Hari Joshi, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Amitabh Mehra, Grant Evan Ley
  • Patent number: 11977757
    Abstract: Profile switching for memory overclocking is described. In accordance with the described techniques, a memory is operated according to a first memory profile. During operation of the memory according to the first memory profile, a request is received to operate the memory according to a second memory profile. Responsive to the request, operation of the memory is switched to operate according to the second memory profile without rebooting. In one or more implementations, at least one of the first memory profile or the second memory profile comprises an overclocking memory profile that configures the memory to operate in an overclocking mode. In one or more implementations, the memory is trained to operate according to the overclocking memory profile prior to operating the memory according to the first memory profile.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: May 7, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Grant Evan Ley, Jayesh Hari Joshi, Amitabh Mehra, Jerry Anton Ahrens, Joshua Taylor Knight, Anil Harwani, William Robert Alverson
  • Publication number: 20240143445
    Abstract: Stability testing for memory overclocking is described. In accordance with the described techniques, operation of a memory with overclocked memory settings is testing during a boot up process of a computing device. Test results based on the testing are exposed via a user interface. The test results predict a stability of the memory over a subsequent time period if the memory is configured to operate with the overclocked memory settings.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Alicia Wen Ju Yurie Leong, William Robert Alverson, Joshua Taylor Knight, Jerry Anton Ahrens, Grant Evan Ley, Anil Harwani, Amitabh Mehra, Jayesh Hari Joshi
  • Publication number: 20230350591
    Abstract: Profile switching for memory overclocking is described. In accordance with the described techniques, a memory is operated according to a first memory profile. During operation of the memory according to the first memory profile, a request is received to operate the memory according to a second memory profile. Responsive to the request, operation of the memory is switched to operate according to the second memory profile without rebooting. In one or more implementations, at least one of the first memory profile or the second memory profile comprises an overclocking memory profile that configures the memory to operate in an overclocking mode. In one or more implementations, the memory is trained to operate according to the overclocking memory profile prior to operating the memory according to the first memory profile.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Grant Evan Ley, Jayesh Hari Joshi, Amitabh Mehra, Jerry Anton Ahrens, Joshua Taylor Knight, Anil Harwani, William Robert Alverson
  • Publication number: 20230350715
    Abstract: Various timing parameter values for a memory system are changed and a workload is run using the changed timing parameter values resulting in workload performance values. The workload is run multiple times with different timing parameter values and the performance values generated by the workload are used to generate and output a performance indication that identifies how sensitive performance of the physical memory is to the one or more timing parameters. The parameter values generated by the workload are optionally used to predict what parameter value the workload would have generated for user selected timing parameter values (e.g., without running the workload).
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Joshua Taylor Knight, Jayesh Hari Joshi, Anil Harwani, Grant Evan Ley, Jerry Anton Ahrens, William Robert Alverson, Amitabh Mehra