Patents by Inventor Jayesh Kumar Pandey

Jayesh Kumar Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On-chip execution of in-system test utilizing a generalized test image
    Patent number: 10890620
    Abstract: Systems and methods enable the updating of tests, test sequences, fault models, and test conditions such as voltage and clock frequencies, over the life cycle of a safety critical application for complex integrated circuits and systems.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: January 12, 2021
    Assignee: NVIDIA Corp.
    Inventors: Milind Bhaiyyasaheb Sonawane, Shantanu K. Sarangi, Sailendra Chadalavada, Sumit Raj, Rangavajjula Kameswara Naga Mahesh, Jayesh Kumar Pandey, Venkat Abilash Reddy Nerallapally
  • ON-CHIP EXECUTION OF IN-SYSTEM TEST UTILIZING A GENERALIZED TEST IMAGE
    Publication number: 20200363470
    Abstract: Systems and methods enable the updating of tests, test sequences, fault models, and test conditions such as voltage and clock frequencies, over the life cycle of a safety critical application for complex integrated circuits and systems.
    Type: Application
    Filed: May 17, 2019
    Publication date: November 19, 2020
    Inventors: Milind Bhaiyyasaheb Sonawane, Shantanu K. Sarangi, Sailendra Chadalavada, Sumit Raj, Rangavajjula Kameswara Naga Mahesh, Jayesh Kumar Pandey, Venkat Abilash Reddy Nerallapally