Patents by Inventor Jayesh Patil

Jayesh Patil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of and circuits for analyzing a phase of a clock signal for receiving data
    Patent number: 8995514
    Abstract: A method of analyzing a phase of a clock signal for receiving data is described. The method comprises identifying an end of an eye pattern associated with received data; testing points along a contour of the eye pattern to establish a margin for an opening of the eye pattern; and determining whether a phase of the clock signal is acceptable for receiving the received data. A circuit for analyzing a phase of a clock signal for receiving data is also described.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 31, 2015
    Assignee: Xilinx, Inc.
    Inventors: Santiago G. Asuncion, Mustansir Fanaswalla, Vaibhav Kamdar, Brandon L. Fernandes, Jayesh Patil