Patents by Inventor JAYSON D. VOGLER

JAYSON D. VOGLER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9645963
    Abstract: An integrated circuit includes a substrate, a master system on the substrate, a slave system on the substrate that is coupled to communicate with the master system, a first clock signal coupled to the master system, and a second clock signal coupled to the slave system. The master system is configured to isolate the slave system from the master system while a first test of the master system is conducted in parallel with a second test of the slave system. The master system uses the first clock signal during the first test and the slave system uses the second clock signal during the second test.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: May 9, 2017
    Assignee: NXP USA, Inc.
    Inventors: Chris N. Stoll, Chris P. Nappi, George R. Redford, Jayson D. Vogler, Khurram Waheed
  • Patent number: 9584175
    Abstract: An integrated circuit includes a receiver portion, a transmitter portion, and a modulated phase locked loop. The receiver portion is for receiving a radio frequency (RF) signal at a receiver input of the receiver portion. The transmitter portion is for transmitting an RF signal at a transmitter output of the transmitter portion. The modulated phase locked loop (PLL) is shared between the receiver portion and the transmitter portion. The transmitter output and receiver input are coupled together in a loopback configuration during a test mode. The transmitter portion and the receiver portion are enabled concurrently while a modulated PLL signal is provided to the receiver portion from the transmitter portion via the loopback configuration.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: February 28, 2017
    Assignee: NXP USA, INC.
    Inventors: Khurram Waheed, Chris N. Stoll, Jayson D. Vogler
  • Publication number: 20160238654
    Abstract: An integrated circuit includes a substrate, a master system on the substrate, a slave system on the substrate that is coupled to communicate with the master system, a first clock signal coupled to the master system, and a second clock signal coupled to the slave system. The master system is configured to isolate the slave system from the master system while a first test of the master system is conducted in parallel with a second test of the slave system. The master system uses the first clock signal during the first test and the slave system uses the second clock signal during the second test.
    Type: Application
    Filed: February 16, 2015
    Publication date: August 18, 2016
    Inventors: CHRIS N. STOLL, CHRIS P. NAPPI, GEORGE R. REDFORD, JAYSON D. VOGLER, KHURRAM WAHEED
  • Publication number: 20160174094
    Abstract: An integrated circuit includes a receiver portion, a transmitter portion, and a modulated phase locked loop. The receiver portion is for receiving a radio frequency (RF) signal at a receiver input of the receiver portion. The transmitter portion is for transmitting an RF signal at a transmitter output of the transmitter portion. The modulated phase locked loop (PLL) is shared between the receiver portion and the transmitter portion. The transmitter output and receiver input are coupled together in a loopback configuration during a test mode. The transmitter portion and the receiver portion are enabled concurrently while a modulated PLL signal is provided to the receiver portion from the transmitter portion via the loopback configuration.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 16, 2016
    Inventors: KHURRAM WAHEED, CHRIS N. STOLL, JAYSON D. VOGLER