Abstract: Apparatuses, methods and storage medium associated with smart memory data store/load technology, are disclosed herein. In embodiments, an apparatus may include a processor; a plurality of memory units; a memory controller coupled with the processor and the plurality of memory units to control access of the plurality of memory units, that includes hardware physical memory interleaving support; and one or more hardware data processing logic blocks coupled to the plurality of memory units to provide near data processing of data received by the plurality of memory units. The apparatus may further include a driver to support applications operated by the processor to perform location-aware memory-mapped device accesses to selectively store or load data into selected ones or aggregation of selected ones of the plurality of memory units contiguously. Other embodiments may be described and/or claimed.

Abstract: Apparatuses, methods and storage medium associated with smart memory data store/load technology, are disclosed herein. In embodiments, an apparatus may include a processor; a plurality of memory units; a memory controller coupled with the processor and the plurality of memory units to control access of the plurality of memory units, that includes hardware physical memory interleaving support; and one or more hardware data processing logic blocks coupled to the plurality of memory units to provide near data processing of data received by the plurality of memory units. The apparatus may further include a driver to support applications operated by the processor to perform location-aware memory-mapped device accesses to selectively store or load data into selected ones or aggregation of selected ones of the plurality of memory units contiguously. Other embodiments may be described and/or claimed.