Patents by Inventor Je-Hun WOO

Je-Hun WOO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210183618
    Abstract: Embodiments of the inventive concepts provide antennas, plasma generating circuits, plasma processing apparatus, and methods for manufacturing semiconductor devices using the same. The circuits include radio-frequency power sources generating radio-frequency powers, antennas receiving the radio-frequency powers to generate plasma and having a first mutual inductance, and inductors connecting the antennas to the radio-frequency power sources, respectively. The inductors have a second mutual inductance reducing and/or canceling the first mutual inductance.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 17, 2021
    Inventors: Dong-Hyub LEE, Dougyong SUNG, Je-Hun WOO, Bongseong KIM, Juho LEE, Yun-Kwang JEON, Junghyun CHO
  • Patent number: 10971333
    Abstract: Embodiments of the inventive concepts provide antennas, plasma generating circuits, plasma processing apparatus, and methods for manufacturing semiconductor devices using the same. The circuits include radio-frequency power sources generating radio-frequency powers, antennas receiving the radio-frequency powers to generate plasma and having a first mutual inductance, and inductors connecting the antennas to the radio-frequency power sources, respectively. The inductors have a second mutual inductance reducing and/or canceling the first mutual inductance.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: April 6, 2021
    Inventors: Dong-Hyub Lee, Dougyong Sung, Je-Hun Woo, Bongseong Kim, Juho Lee, Yun-Kwang Jeon, Junghyun Cho
  • Publication number: 20180366304
    Abstract: A plasma processing apparatus and a method for fabricating a semiconductor device using the same are provided. The plasma processing apparatus includes: a chuck stage configured to support a wafer thereon; a dielectric ring configured to surround a periphery of the chuck stage, the dielectric ring including a paraelectric material; and a dielectric constant controller configured to control a dielectric constant of the dielectric ring.
    Type: Application
    Filed: January 10, 2018
    Publication date: December 20, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Bo SHIM, Nam Jun KANG, Se Kwon NA, Je-Hun WOO, Seung Kyu LIM, Ji Soo IM
  • Publication number: 20180114700
    Abstract: A method of atomic layer etching and fabricating a semiconductor device using the same, the atomic layer etching including providing a layer including atomic layers each having first and second atoms, the second atoms being different from the first atoms; and sequentially removing each of the atomic layers, wherein removing each of the atomic layers includes: providing a first etching gas that reacts with the first atoms such that the first etching gas is adsorbed on the first atoms; purging the first etching gas not adsorbed on the first atoms; removing the first atoms on which the first etching gas is adsorbed; providing a second etching gas that reacts with the second atoms such that the second etching gas is adsorbed on the second atoms; purging the second etching gas not adsorbed on the second atoms; and removing the second atoms on which the second etching gas is adsorbed.
    Type: Application
    Filed: April 19, 2017
    Publication date: April 26, 2018
    Inventors: Je-Hun WOO, Dougyong SUNG, Sejin OH
  • Publication number: 20180114675
    Abstract: Embodiments of the inventive concepts provide antennas, plasma generating circuits, plasma processing apparatus, and methods for manufacturing semiconductor devices using the same. The circuits include radio-frequency power sources generating radio-frequency powers, antennas receiving the radio-frequency powers to generate plasma and having a first mutual inductance, and inductors connecting the antennas to the radio-frequency power sources, respectively. The inductors have a second mutual inductance reducing and/or canceling the first mutual inductance.
    Type: Application
    Filed: October 3, 2017
    Publication date: April 26, 2018
    Inventors: Dong-Hyub LEE, Dougyong SUNG, Je-Hun WOO, Bongseong KIM, Juho Lee, Yun-Kwang JEON, Junghyun CHO
  • Publication number: 20170330734
    Abstract: A plasma processing apparatus includes a process chamber providing a space for plasma processing, a lower electrode that is in the process chamber, a surface of the lower electrode being for mounting a wafer thereon, an upper electrode that is in the process chamber and faces the lower electrode, a gas supplier configured to supply process gas between the upper electrode and the lower electrode, a focus ring arranged on the lower electrode to surround an edge of the wafer mounted on the lower electrode, an edge ring arranged below the focus ring and including first bodies that are separate from each other with a space therebetween, a plurality of heaters installed in the first bodies, and a heater controller configured to separately control driving of each of the heaters.
    Type: Application
    Filed: December 20, 2016
    Publication date: November 16, 2017
    Inventors: Jun-soo LEE, Je-hun WOO, Sang-min JEONG, Eung-su KIM, Hak-young KIM
  • Publication number: 20170186586
    Abstract: A plasma system includes a source electrode, an RF source power generation unit, an RF source power output unit, and a source power output managing unit. The source power output managing unit determines an amplitude and a duty cycle of a pulse RF source power based on information on an amplitude of a continuous wave RF source power.
    Type: Application
    Filed: November 16, 2016
    Publication date: June 29, 2017
    Inventors: Sejin Oh, Je-Hun Woo, Chungho Cho, Dougyong Sung, Jang Gyoo Yang, Jaechul Jung
  • Patent number: 9691618
    Abstract: Provided are a semiconductor device fabricating apparatus configured to perform an atomic layer etching process and a method of fabricating a semiconductor device including performing the atomic layer etching process. The method includes loading a wafer onto an electrostatic chuck in a chamber, performing a first periodical process in which a first gas is supplied to an inside of the chamber and the first gas is adsorbed onto the wafer, performing a second periodical process in which a second gas is supplied to the inside of the chamber and the first gas remaining in the chamber is exhausted to an outside of the chamber, performing a third periodical process in which a third gas is supplied to the inside of the chamber, plasma including the third gas is generated, the plasma collides with the wafer, and the first gas adsorbed onto the wafer is removed, and unloading the wafer to the outside of the chamber.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: June 27, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dougyong Sung, Sejin Oh, Je-Hun Woo, Hyunju Lee, Seungkyu Lim, Kiho Hwang
  • Publication number: 20170140937
    Abstract: Provided are a semiconductor device fabricating apparatus configured to perform an atomic layer etching process and a method of fabricating a semiconductor device including performing the atomic layer etching process. The method includes loading a wafer onto an electrostatic chuck in a chamber, performing a first periodical process in which a first gas is supplied to an inside of the chamber and the first gas is adsorbed onto the wafer, performing a second periodical process in which a second gas is supplied to the inside of the chamber and the first gas remaining in the chamber is exhausted to an outside of the chamber, performing a third periodical process in which a third gas is supplied to the inside of the chamber, plasma including the third gas is generated, the plasma collides with the wafer, and the first gas adsorbed onto the wafer is removed, and unloading the wafer to the outside of the chamber.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 18, 2017
    Inventors: Dougyong SUNG, Sejin OH, Je-Hun WOO, Hyunju LEE, Seungkyu LIM, Kiho HWANG
  • Patent number: 9490107
    Abstract: A plasma apparatus includes a process chamber having an inner space, a chuck disposed in the process chamber and having a top surface on which a substrate is loaded, a gas supply unit supplying a process gas into the process chamber, a plasma generating unit generating plasma over the chuck, and a direct current (DC) power generator applying a DC pulse signal to the chuck. A period of the DC pulse signal may include a negative pulse duration during which a negative pulse is applied, a positive pulse duration during which a positive pulse is applied, and a pulse-off duration during which the negative pulse and the positive pulse are turned off. The positive pulse duration is between the negative pulse duration and the pulse-off duration. The pulse-off duration may comprise a voltage having a lower magnitude than the voltage of the positive pulse, such as a ground voltage.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: November 8, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moojin Kim, Bongseong Kim, DeogJa Koo, Je-Hun Woo, Unjoo Lee
  • Publication number: 20150325413
    Abstract: A plasma apparatus includes a process chamber having an inner space, a chuck disposed in the process chamber and having a top surface on which a substrate is loaded, a gas supply unit supplying a process gas into the process chamber, a plasma generating unit generating plasma over the chuck, and a direct current (DC) power generator applying a DC pulse signal to the chuck. A period of the DC pulse signal may include a negative pulse duration during which a negative pulse is applied, a positive pulse duration during which a positive pulse is applied, and a pulse-off duration during which the negative pulse and the positive pulse are turned off. The positive pulse duration is between the negative pulse duration and the pulse-off duration. The pulse-off duration may comprise a voltage having a lower magnitude than the voltage of the positive pulse, such as a ground voltage.
    Type: Application
    Filed: April 29, 2015
    Publication date: November 12, 2015
    Inventors: MOOJIN KIM, Bongseong KIM, DeogJa KOO, Je-Hun WOO, Unjoo LEE