Patents by Inventor Je-hyung Yoon
Je-hyung Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230246551Abstract: A multi-phase switching regulator and a switching regulating method using the multi-phase switching regulator employ an interleaving circuit. The multi-phase switching regulator includes: a first regulating circuit configured to receive an input voltage and generate a first sub-output voltage with a first phase by transforming the input voltage in response to a first set signal; a second regulating circuit configured to receive the input voltage and generate a second sub-output voltage with a second phase by transforming the input voltage in response to a second set signal; and the interleaving circuit configured to repeatedly and sequentially generate the first set signal and the second set signal by comparing a reference voltage with an output voltage generated based on the first sub-output voltage and the second sub-output voltage.Type: ApplicationFiled: April 6, 2023Publication date: August 3, 2023Inventors: SUN-KYU LEE, NGUYEN HUYHIEU, DONG-JIN KEUM, JE-HYUNG YOON, HEE-SEOK HAN
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Patent number: 11637498Abstract: A multi-phase switching regulator and a switching regulating method using the multi-phase switching regulator employ an interleaving circuit. The multi-phase switching regulator includes: a first regulating circuit configured to receive an input voltage and generate a first sub-output voltage with a first phase by transforming the input voltage in response to a first set signal; a second regulating circuit configured to receive the input voltage and generate a second sub-output voltage with a second phase by transforming the input voltage in response to a second set signal; and the interleaving circuit configured to repeatedly and sequentially generate the first set signal and the second set signal by comparing a reference voltage with an output voltage generated based on the first sub-output voltage and the second sub-output voltage.Type: GrantFiled: September 6, 2021Date of Patent: April 25, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-Kyu Lee, Nguyen Huyhieu, Dong-Jin Keum, Je-Hyung Yoon, Hee-Seok Han
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Publication number: 20210399641Abstract: A multi-phase switching regulator and a switching regulating method using the multi-phase switching regulator employ an interleaving circuit. The multi-phase switching regulator includes: a first regulating circuit configured to receive an input voltage and generate a first sub-output voltage with a first phase by transforming the input voltage in response to a first set signal; a second regulating circuit configured to receive the input voltage and generate a second sub-output voltage with a second phase by transforming the input voltage in response to a second set signal; and the interleaving circuit configured to repeatedly and sequentially generate the first set signal and the second set signal by comparing a reference voltage with an output voltage generated based on the first sub-output voltage and the second sub-output voltage.Type: ApplicationFiled: September 6, 2021Publication date: December 23, 2021Inventors: SUN-KYU LEE, NGUYEN HUYHIEU, DONG-JIN KEUM, JE-HYUNG YOON, HEE-SEOK HAN
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Patent number: 11152860Abstract: A multi-phase switching regulator and a switching regulating method using the multi-phase switching regulator employ an interleaving circuit. The multi-phase switching regulator includes: a first regulating circuit configured to receive an input voltage and generate a first sub-output voltage with a first phase by transforming the input voltage in response to a first set signal; a second regulating circuit configured to receive the input voltage and generate a second sub-output voltage with a second phase by transforming the input voltage in response to a second set signal; and the interleaving circuit configured to repeatedly and sequentially generate the first set signal and the second set signal by comparing a reference voltage with an output voltage generated based on the first sub-output voltage and the second sub-output voltage.Type: GrantFiled: August 14, 2019Date of Patent: October 19, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-Kyu Lee, Nguyen Huyhieu, Dong-Jin Keum, Je-Hyung Yoon, Hee-Seok Han
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Publication number: 20200119648Abstract: A multi-phase switching regulator and a switching regulating method using the multi-phase switching regulator employ an interleaving circuit. The multi-phase switching regulator includes: a first regulating circuit configured to receive an input voltage and generate a first sub-output voltage with a first phase by transforming the input voltage in response to a first set signal; a second regulating circuit configured to receive the input voltage and generate a second sub-output voltage with a second phase by transforming the input voltage in response to a second set signal; and the interleaving circuit configured to repeatedly and sequentially generate the first set signal and the second set signal by comparing a reference voltage with an output voltage generated based on the first sub-output voltage and the second sub-output voltage.Type: ApplicationFiled: August 14, 2019Publication date: April 16, 2020Inventors: SUN-KYU LEE, NGUYEN HUYHIEU, DONG-JIN KEUM, JE-HYUNG YOON, HEE-SEOK HAN
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Patent number: 10340681Abstract: A power management system comprises a power converter comprising a power stage and configured to detect an abnormal static state of the power stage, to generate a protection signal in response to the detection of the abnormal static state of the power stage, and to stabilize a direct current (DC) power supply voltage in response to an enable signal to generate a DC output voltage, and a main control circuit configured to generate the enable signal for the power converter based on the protection signal received from the power converter.Type: GrantFiled: November 26, 2014Date of Patent: July 2, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Ik Cho, Hyoung-Seok Oh, Je-Hyung Yoon, Yoo-Jun Jeong
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Patent number: 9531249Abstract: A voltage converter includes a driving device unit, a current sensing unit and a switching control circuit. The driving device unit charges an input power supply voltage in an inductor, connected between a switching node and an output node, in response to a first driving control signal, and discharges the inductor in response to a second driving control signal. The current sensing unit generates first and second sensing signals based on a first sensed current, a second sensed current, a voltage at the switching node and a ground voltage. The switching control circuit generates the first and second driving control signals by performing a pulse-frequency modulation (PFM) and a pulse-width modulation (PWM) based on a feedback voltage, a reference voltage and the first and second sensing signals. The switching control circuit adaptively adjusts off-time when the switching control circuit performs the PFM.Type: GrantFiled: October 20, 2014Date of Patent: December 27, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Je-Hyung Yoon, Ha-Neul Kim, Hyoung-Seok Oh, Kyoung-Jin Lee, Sang-Ik Cho
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Publication number: 20150214827Abstract: A voltage converter includes a driving device unit, a current sensing unit and a switching control circuit. The driving device unit charges an input power supply voltage in an inductor, connected between a switching node and an output node, in response to a first driving control signal, and discharges the inductor in response to a second driving control signal. The current sensing unit generates first and second sensing signals based on a first sensed current, a second sensed current, a voltage at the switching node and a ground voltage. The switching control circuit generates the first and second driving control signals by performing a pulse-frequency modulation (PFM) and a pulse-width modulation (PWM) based on a feedback voltage, a reference voltage and the first and second sensing signals. The switching control circuit adaptively adjusts off-time when the switching control circuit performs the PFM.Type: ApplicationFiled: October 20, 2014Publication date: July 30, 2015Inventors: Je-Hyung YOON, Ha-Neul KIM, Hyoung-Seok OH, Kyoung-Jin LEE, Sang-Ik CHO
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Publication number: 20150205338Abstract: A power management system comprises a power converter comprising a power stage and configured to detect an abnormal static state of the power stage, to generate a protection signal in response to the detection of the abnormal static state of the power stage, and to stabilize a direct current (DC) power supply voltage in response to an enable signal to generate a DC output voltage, and a main control circuit configured to generate the enable signal for the power converter based on the protection signal received from the power converter.Type: ApplicationFiled: November 26, 2014Publication date: July 23, 2015Inventors: SANG-IK CHO, HYOUNG-SEOK OH, JE-HYUNG YOON, YOO-JUN JEONG
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Patent number: 9058050Abstract: In a clock-based soft-start circuit configured to generate a soft-start reference voltage that restrains an inrush current at an initialization of power supplied to a DC-DC converter, the clock-based soft-start circuit comprises a time setting unit configured to set a soft-start time period in response to a clock signal. A ramp circuit is configured to generate a soft-start reference voltage which is ramped upward or downward between a base level and a reference voltage level during the soft start time period set by the time setting unit. In this manner, the clock-based soft-start circuit is applicable for all DC-DC converters and the soft-start in a linear slope is possible.Type: GrantFiled: December 13, 2012Date of Patent: June 16, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyoung-Jin Lee, Hee-Mun Bang, Hyoung-Seok Oh, Je-Hyung Yoon
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Publication number: 20130265807Abstract: In a clock-based soft-start circuit configured to generate a soft-start reference voltage that restrains an inrush current at an initialization of power supplied to a DC-DC converter, the clock-based soft-start circuit comprises a time setting unit configured to set a soft-start time period in response to a clock signal. A ramp circuit is configured to generate a soft-start reference voltage which is ramped upward or downward between a base level and a reference voltage level during the soft start time period set by the time setting unit. In this manner, the clock-based soft-start circuit is applicable for all DC-DC converters and the soft-start in a linear slope is possible.Type: ApplicationFiled: December 13, 2012Publication date: October 10, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyoung-Jin Lee, Hee- Mun Bang, Hyoung-Seok Oh, Je-Hyung Yoon
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Patent number: 7804361Abstract: A low noise amplifier is provided. The low noise amplifier includes: a low noise amplifying unit amplifying an input signal; a harmonic and noise generating unit disposed in an input terminal of the low noise amplifying unit, for generating a compensating signal for compensating for an intermodulation distortion signal and a thermal noise signal of the input signal to the low noise amplifying unit; and a load unit outputting the amplified input signal generated by the low noise amplifying unit.Type: GrantFiled: August 21, 2008Date of Patent: September 28, 2010Assignee: Samsung Electronics, Co., Ltd.Inventors: Hyung-sun Lim, Jin-soo Park, Heung-bae Lee, Young-eil Kim, Sang-yoon Jeon, Ick-jin Kwon, Bum-man Kim, Je-hyung Yoon
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Publication number: 20090212861Abstract: A low noise amplifier is provided. The low noise amplifier includes: a low noise amplifying unit amplifying an input signal; a harmonic and noise generating unit disposed in an input terminal of the low noise amplifying unit, for generating a compensating signal for compensating for an intermodulation distortion signal and a thermal noise signal of the input signal to the low noise amplifying unit; and a load unit outputting the amplified input signal generated by the low noise amplifying unit.Type: ApplicationFiled: August 21, 2008Publication date: August 27, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyung-sun LIM, Jin-soo Park, Heung-bae Lee, Young-eil Kim, Sang-yoon Jeon, Ick-jin Kwon, Bum-man Kim, Je-hyung Yoon