Patents by Inventor Je Yoon Kim
Je Yoon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11939308Abstract: The present disclosure provides a novel biphenyl derivative compound or a pharmaceutically acceptable salt thereof. The biphenyl derivative compound or pharmaceutically acceptable salt thereof according to the present disclosure is a compound that increases Nm23-H1/NDPK activity and can inhibit cancer metastasis and growth. Thus, it exhibits excellent effects not only on the prevention, alleviation and treatment of cancer, but also on the suppression of cancer metastasis.Type: GrantFiled: May 30, 2019Date of Patent: March 26, 2024Assignee: EWHA University—Industry Collaboration FoundationInventors: Kong Joo Lee, Hee-Yoon Lee, Je Jin Lee, Hwang Suk Kim, Ji-Wan Seo, Hongsoo Lee, Ji Soo Shin, Bo-kyung Kim
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Patent number: 11913787Abstract: The present disclosure provides a target for aerial survey transformable to hand-fan shape. In this instance, the target includes a central axis, a first identification marker with one end connected to the central axis and having a first length outwards, and a second identification marker with one end connected to the central axis and having a second length outwards, the second identification marker disposed on the first identification marker, wherein the second length is shorter than the first length, the first identification marker includes a plurality of first unit areas having a predetermined angle therebetween with respect to the central axis, and the plurality of first unit areas has an overlap between adjacent first unit areas.Type: GrantFiled: November 24, 2020Date of Patent: February 27, 2024Assignee: NATIONAL DISASTER MANAGEMENT RESEARCH INSTITUTEInventors: Seong Sam Kim, Dong Yoon Shin, Hyun Ju Nho, Je Sung Park, Hyun Ju Kim
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Patent number: 8929173Abstract: A data strobe control device is disclosed, which relates to a technology for controlling a data write path of a semiconductor memory device. The data strobe control device includes: a plus-mode controller configured to output a first control signal for controlling a first mode and a plus on-the-fly signal upon receiving a plus-mode signal and an on-the-fly signal; an on-the-fly controller configured to output a second control signal for controlling a second mode according to the on-the-fly signal and an operation signal; a path controller configured to latch an address in response to the second control signal during the second mode, latch the address in response to the first control signal during the first mode, and accordingly output an address latch signal; and a strobe pulse generator configured to output a strobe control signal synchronized with a control clock signal in response to the address latch signal and a burst length signal.Type: GrantFiled: November 21, 2013Date of Patent: January 6, 2015Assignee: SK Hynix Inc.Inventor: Je Yoon Kim
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Publication number: 20140369153Abstract: A data strobe control device is disclosed, which relates to a technology for controlling a data write path of a semiconductor memory device. The data strobe control device includes: a plus-mode controller configured to output a first control signal for controlling a first mode and a plus on-the-fly signal upon receiving a plus-mode signal and an on-the-fly signal; an on-the-fly controller configured to output a second control signal for controlling a second mode according to the on-the-fly signal and an operation signal; a path controller configured to latch an address in response to the second control signal during the second mode, latch the address in response to the first control signal during the first mode, and accordingly output an address latch signal; and a strobe pulse generator configured to output a strobe control signal synchronized with a control clock signal in response to the address latch signal and a burst length signal.Type: ApplicationFiled: November 21, 2013Publication date: December 18, 2014Applicant: SK hynix Inc.Inventor: Je Yoon KIM
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Patent number: 8766694Abstract: A semiconductor integrated circuit includes a rupture instructing pulse generation unit configured to generate a rupture instructing pulse signal in response to a fuse rupture command signal and an address; a first anti-fuse rupture unit configured to perform an operation for rupturing a first anti-fuse during an enable period of the rupture instructing pulse signal, and generate rupture information of the first anti-fuse; a pulse shifting unit configured to delay the rupture instructing pulse signal and generate a delayed rupture instructing pulse signal; and a second anti-fuse rupture unit configured to perform an operation for rupturing a second anti-fuse during an enable period of the delayed rupture instructing pulse signal, and generate rupture information of the second anti-fuse.Type: GrantFiled: September 1, 2012Date of Patent: July 1, 2014Assignee: SK Hynix Inc.Inventor: Je Yoon Kim
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Publication number: 20140169059Abstract: A fuse repair device may include a first fuse circuit configured to store a first portion out of a failed address, a second fuse circuit configured to store a multipurpose information or a second portion of the failed address, an enable control circuit configured to provide a first enable signal to enable the second fuse unit based on a first control signal, a switch control circuit configured to provide a second enable signal to enable the second fuse unit based on a second control signal, a repair control signal generation circuit configured to compare data stored in the first fuse circuit and the second fuse circuit with an input address, and generate a repair control signal based on the first enable signal and the second enable signal, and a multipurpose control signal generation circuit configured to generate a multipurpose control signal to control operations different from a repair operation.Type: ApplicationFiled: March 18, 2013Publication date: June 19, 2014Applicant: SK HYNIX INC.Inventors: Yong-Ho KONG, Je-Yoon KIM
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Patent number: 8625375Abstract: A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal.Type: GrantFiled: October 31, 2012Date of Patent: January 7, 2014Assignee: Hynix Semiconductor Inc.Inventors: Je-Yoon Kim, Jong C. Lee
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Publication number: 20130222030Abstract: A semiconductor integrated circuit includes a rupture instructing pulse generation unit configured to generate a rupture instructing pulse signal in response to a fuse rupture command signal and an address; a first anti-fuse rupture unit configured to perform an operation for rupturing a first anti-fuse during an enable period of the rupture instructing pulse signal, and generate rupture information of the first anti-fuse; a pulse shifting unit configured to delay the rupture instructing pulse signal and generate a delayed rupture instructing pulse signal; and a second anti-fuse rupture unit configured to perform an operation for rupturing a second anti-fuse during an enable period of the delayed rupture instructing pulse signal, and generate rupture information of the second anti-fuse.Type: ApplicationFiled: September 1, 2012Publication date: August 29, 2013Applicant: SK HYNIX INC.Inventor: Je Yoon KIM
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Patent number: 8416634Abstract: A semiconductor memory device includes a pad, an impedance calibration circuit configured to provide a first code value corresponding to an impedance value coupled to the pad, a PVT sensing control circuit configured to provide a second code value corresponding to a PVT variation, and an output driver configured to receive data and to pull up or pull down the pad in response to the first code value and second code value.Type: GrantFiled: December 29, 2010Date of Patent: April 9, 2013Assignee: Hynix Semiconductor Inc.Inventor: Je-Yoon Kim
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Patent number: 8315116Abstract: A repair circuit of a semiconductor memory apparatus includes a repair address detection circuit that determines the occurrence of a failure in a memory block based on a plurality of test data signals outputted from the memory block, and stores an address corresponding to the memory block determined to have failed as a repair address, and an anti-fuse circuit that receives the repair address from the repair address detection circuit and electrically programs the repair address to store a programmed address.Type: GrantFiled: July 20, 2010Date of Patent: November 20, 2012Assignee: SK Hynix Inc.Inventors: Je Yoon Kim, Ki Chang Kwean
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Patent number: 8300486Abstract: A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal.Type: GrantFiled: December 30, 2009Date of Patent: October 30, 2012Assignee: Hynix Semiconductor Inc.Inventors: Je-Yoon Kim, Jong-Chern Lee
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Patent number: 8248877Abstract: A circuit for compensating a temperature measurement range of a semiconductor memory apparatus is presented. The circuit includes an oscillator, a temperature variable pulse generating unit, a counter, and an output controlling unit. The counter enable signal generating unit inputs a temperature pulse and outputs a counter enable signal corresponding to the temperature pulse in response to receiving a control signal. The counter inputs and counts an oscillator signal in response to receiving the counter enable signal and outputs a counting signal. The output controlling unit outputs a temperature information code signal proportional to the counting signal or to output the temperature information code signal at a fixed level corresponding to a maximum value of the counting signal.Type: GrantFiled: December 29, 2009Date of Patent: August 21, 2012Assignee: Hynix Semiconductor Inc.Inventor: Je Yoon Kim
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Publication number: 20110267900Abstract: A semiconductor memory device includes a pad, an impedance calibration circuit configured to provide a first code value corresponding to an impedance value coupled to the pad, a PVT sensing control circuit configured to provide a second code value corresponding to a PVT variation, and an output driver configured to receive data and to pull up or pull down the pad in response to the first code value and second code value.Type: ApplicationFiled: December 29, 2010Publication date: November 3, 2011Inventor: Je-Yoon Kim
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Publication number: 20110267908Abstract: A repair circuit of a semiconductor memory apparatus includes a repair address detection circuit that determines the occurrence of a failure in a memory block based on a plurality of test data signals outputted from the memory block, and stores an address corresponding to the memory block determined to have failed as a repair address, and an anti-fuse circuit that receives the repair address from the repair address detection circuit and electrically programs the repair address to store a programmed address.Type: ApplicationFiled: July 20, 2010Publication date: November 3, 2011Applicant: Hynix Semiconductor Inc.Inventors: Je Yoon KIM, Ki Chang KWEAN
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Patent number: 8045400Abstract: A circuit for controlling the read cycle includes plurality of shift stages configured to sequentially shift read signals; and an activating unit configured to activate a read cycle signal which represents a read cycle, by performing logical operation for output signals of the plurality of the shift stages, wherein the plurality of the shift stages are configured to sequentially shift the read signals for a period corresponding to burst setting information.Type: GrantFiled: June 30, 2009Date of Patent: October 25, 2011Assignee: Hynix Semiconductor Inc.Inventors: Je-Yoon Kim, Jong-Chern Lee
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Publication number: 20110026349Abstract: A circuit for compensating a temperature measurement range of a semiconductor memory apparatus is presented. The circuit includes an oscillator, a temperature variable pulse generating unit, a counter, and an output controlling unit. The counter enable signal generating unit inputs a temperature pulse and outputs a counter enable signal corresponding to the temperature pulse in response to receiving a control signal. The counter inputs and counts an oscillator signal in response to receiving the counter enable signal and outputs a counting signal. The output controlling unit outputs a temperature information code signal proportional to the counting signal or to output the temperature information code signal at a fixed level corresponding to a maximum value of the counting signal.Type: ApplicationFiled: December 29, 2009Publication date: February 3, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Je Yoon KIM
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Publication number: 20100315896Abstract: A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal.Type: ApplicationFiled: December 30, 2009Publication date: December 16, 2010Applicant: Hynix Semiconductor Inc.Inventors: JE-YOON KIM, Jong Chern Lee
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Publication number: 20100290263Abstract: A circuit for controlling the read cycle includes plurality of shift stages configured to sequentially shift read signals; and an activating unit configured to activate a read cycle signal which represents a read cycle, by performing logical operation for output signals of the plurality of the shift stages, wherein the plurality of the shift stages are configured to sequentially shift the read signals for a period corresponding to burst setting information.Type: ApplicationFiled: June 30, 2009Publication date: November 18, 2010Inventors: Je-Yoon Kim, Jong-Chern Lee
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Patent number: 7705636Abstract: The present invention relates to a buffer circuit of a semiconductor memory device, and includes a common bias supply unit and a plurality of interface units having a differential amplifying structure. Each interface unit receives an input signal and differentially amplifies the input signal and a common bias. The common bias supply unit is driven by a reference voltage to provide the common bias signal to each of the interface units. The buffer circuit makes it possible to reduce the area occupied by the buffer circuit in a semiconductor memory device.Type: GrantFiled: December 26, 2007Date of Patent: April 27, 2010Assignee: Hynix Semiconductor, Inc.Inventors: Je Yoon Kim, Jong Chern Lee
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Publication number: 20090066371Abstract: The present invention relates to a buffer circuit of a semiconductor memory device, and includes a common bias supply unit and a plurality of interface units having a differential amplifying structure. Each interface unit receives an input signal and differentially amplifies the input signal and a common bias. The common bias supply unit is driven by a reference voltage to provide the common bias signal to each of the interface units. The buffer circuit makes it possible to reduce the area occupied by the buffer circuit in a semiconductor memory device.Type: ApplicationFiled: December 26, 2007Publication date: March 12, 2009Inventors: Je Yoon KIM, Jong Chern LEE