Abstract: In the present invention a bit line precharge circuit is used to prevent errors from a write operation in memory cells adjacent to the column being written. The precharge circuits are enabled by write enable and selected by the Y decoder in such a way that only precharge circuits on bit lines adjacent to the active bit lines in a write operation are activated. All other precharge circuits on bit lines more remote than immediately adjacent bit lines are not activated and thus saving power during a write operation.

Abstract: This invention presents an all-N-logic true-single-phase CMOS dynamic logic circuit for high speed operation with a low supply voltage, in which a bootstrapped circuit containing a bootstrap capacitor, an inverter and a PMOS transistor is incorporated to a conventional non-inverting N1-block.

Abstract: This invention discloses a 1.5 V bootstrapped pass-transistor-based Manchester-carry-chain circuit suitable for CMOS VLSI using a low supply voltage, in which a bootstrapper circuit is incorporated to enhance the speed performance of the conventional Manchester-carry-chain circuit, which is composed. The bootstrapper circuit contains two P-type metal-oxide-semiconductor (PMOS) transistors, one N-type metal-oxide-semiconductor (NMOS) transistor; a capacitor device, and an inverter. The bootstrapper circuit provides an output having a voltage overshoot, as a carry propagation signal, to the gate of a pass transistor of the Manchester-carry-chain circuit.

Abstract: A 1.5V full-swing bootstrapped CMOS large capacitive-load driver circuit using two bootstrap capacitors to enhance the switching speed for low-voltage deep-submicron CMOS VLSI. For a supply voltage of 1.5V, the full-swing bootstrapped CMOS driver circuit shows a 2.2 times improvement in switching speed in driving a capacitive load of 10 pF as compared to the conventional CMOS driver circuit. Even for a supply voltage of 1V, this full-swing bootstrapped CMOS large capacitive-load driver circuit is still advantageous.