Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: A scan electrode driving apparatus of an AC PDP including a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes alternately arranged to make pairs with each other, and having a panel capacitor between the scan electrodes and the sustain electrodes, includes a power recovery unit for supplying power to a panel in order to apply waveforms for sustain-discharge and recovering and re-using the supplied power, a ramp waveform applier for supplying a pulse signal for resetting the states of the respective discharge cells on the basis of the power received from the power recovery unit, and a scan pulse generator for accumulating a wall charge into the addressed discharge cells.

Abstract: A method for driving a plasma display panel includes applying an erasing pulse, a reset pulse and a scan pulse respectively in each of an erasing period, a reset period and a scan period. In a reset period, a reset pulse with a waveform of a sloped ramp pulse is applied to the scan electrode. The sloped ramp pulse induces a discharge between the scan electrode and the address electrode in the middle of the period while the pulse voltage increases. This prevents extremely high discharges between the scan electrode and the address electrode and improves the contrast of the display. An apparatus that implements such method is also disclosed.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: An apparatus for driving a plasma display panel (PDP), which is capable of simplifying the structure of a sustain circuit directly affecting the illumination and power consumption of the PDP and increasing an energy recovery rate, and a method thereof are provided. The structure and switching sequence of the sustain circuit are designed so that the transition time to increase the amount of current of an inductor in an energy recovery circuit when charging/discharging the PDP can be minimized. Accordingly, the recovery rate of displacement power can be increased, and EMI can be decreased by not causing switching loss. In addition, the number of circuits required in the apparatus for driving the PDP can be reduced smaller than the number of circuits required in a conventional PDP driver.

Abstract: The present invention discloses an energy recovery sustain circuit for an AC plasma display panel in which includes one energy recovery sustain circuit incorporating X and Y electrodes. The invention includes a load capacitor, first and fourth switching elements to charge the load capacitor up to a predetermined positive voltage, a second and third switching elements to charge the load capacitor up to a predetermined negative voltage, a fifth switching element to apply an external voltage to the load capacitor to continually sustain the predetermined positive or negative voltage in the load capacitor during a certain period, an inductor for generating the certain leveled positive or negative voltage to charge the load capacitor, and first and second capacitors for charging or discharging a current flowing through the inductor. The invention has a simplified configuration, low production cost, and high reliability.

Abstract: A method for driving a plasma display panel includes applying an erasing pulse, a reset pulse and a scan pulse respectively in each of an erasing period, a reset period and a scan period. In a reset period, a reset pulse with a waveform of a sloped ramp pulse is applied to the scan electrode. The sloped ramp pulse induces a discharge between the scan electrode and the address electrode in the middle of the period while the pulse voltage increases. This prevents extremely high discharges between the scan electrode and the address electrode and improves the contrast of the display. An apparatus that implements such method is also disclosed.

Abstract: An apparatus for driving a plasma display panel (PDP), which is capable of simplifying the structure of a sustain circuit directly affecting the illumination and power consumption of the PDP and increasing an energy recovery rate, and a method thereof are provided. The structure and switching sequence of the sustain circuit are designed so that the transition time to increase the amount of current of an inductor in an energy recovery circuit when charging/discharging the PDP can be minimized. Accordingly, the recovery rate of displacement power can be increased, and EMI can be decreased by not causing switching loss. In addition, the number of circuits required in the apparatus for driving the PDP can be reduced smaller than the number of circuits required in a conventional PDP driver.

Abstract: A scan electrode driving apparatus of an AC PDP including a plurality of address electrodes and a plurality of scan electrodes and sustain electrodes alternately arranged to make pairs with each other, and having a panel capacitor between the scan electrodes and the sustain electrodes, includes a power recovery unit for supplying power to a panel in order to apply waveforms for sustain-discharge and recovering and re-using the supplied power, a ramp waveform applier for supplying a pulse signal for resetting the states of the respective discharge cells on the basis of the power received from the power recovery unit, and a scan pulse generator for accumulating a wall charge into the addressed discharge cells.

Abstract: The present invention discloses an energy recovery sustain circuit for an AC plasma display panel in which includes one energy recovery sustain circuit incorporating X and Y electrodes. The invention includes a load capacitor, first and fourth switching elements to charge the load capacitor up to a predetermined positive voltage, a second and third switching elements to charge the load capacitor up to a predetermined negative voltage, a fifth switching element to apply an external voltage to the load capacitor to continually sustain the predetermined positive or negative voltage in the load capacitor during a certain period, an inductor for generating the certain leveled positive or negative voltage to charge the load capacitor, and first and second capacitors for charging or discharging a current flowing through the inductor. The invention has a simplified configuration, low production cost, and high reliability.