Abstract: An organic light emitting diode (OLED) display device is disclosed. In the OLED display device, a timing controller compares reference voltages output from driving integrated circuits (driving ICs). When a deviation occurs in the reference voltages, the timing controller compensates for the deviation of reference voltages. The OLED display device includes a display panel having reference voltage lines and a plurality of pixels, a data driving circuit having a plurality of driving ICs to generate reference voltages and to supply the reference voltages to the reference voltage lines of the display panel, and a timing controller for comparing reference voltages respectively output from the driving ICs to the display panel, thereby controlling the driving ICs such that the reference voltages respectively output from the driving ICs are equalized.

Abstract: An organic light emitting diode (OLED) display device is disclosed. In the OLED display device, a timing controller compares reference voltages output from driving integrated circuits (driving ICs). When a deviation occurs in the reference voltages, the timing controller compensates for the deviation of reference voltages. The OLED display device includes a display panel having reference voltage lines and a plurality of pixels, a data driving circuit having a plurality of driving ICs to generate reference voltages and to supply the reference voltages to the reference voltage lines of the display panel, and a timing controller for comparing reference voltages respectively output from the driving ICs to the display panel, thereby controlling the driving ICs such that the reference voltages respectively output from the driving ICs are equalized.

Abstract: In one aspect, a charge trap flash memory device is provided which includes a semiconductor substrate, source and drain regions which are spaced apart in an active region of the semiconductor substrate to define a channel region therebetween, a tunneling dielectric layer located on the channel region, an organic polymer thin film located on the tunneling dielectric layer, metal or metal oxide nano-crystals embedded in the organic polymer thin film, and a gate located on the organic polymer thin film.

Abstract: In one aspect, a charge trap flash memory device is provided which includes a semiconductor substrate, source and drain regions which are spaced apart in an active region of the semiconductor substrate to define a channel region therebetween, a tunneling dielectric layer located on the channel region, an organic polymer thin film located on the tunneling dielectric layer, metal or metal oxide nano-crystals embedded in the organic polymer thin film, and a gate located on the organic polymer thin film.

Abstract: A nonvolatile polymer bistability memory device using nano particles that are formed in a polymer thin film and a method of manufacturing the nonvolatile polymer bistability memory device are provided. The nonvolatile polymer bistability memory device includes a semiconductor substrate, a first electrode on the semiconductor substrate, a polymer thin film on the first electrode, nano particles embedded into the polymer thin film, and a second electrode on the polymer thin film. The nonvolatile polymer bistability memory device does not need any source and drain to operate, and the method of manufacturing the nonvolatile polymer bistability memory device can guarantee high production efficiencies while maintaining low manufacturing costs.