Abstract: The present invention provides for generating high volumes of synthetic data records for testing data processing applications associated with one or more operating fields, such as healthcare without using any confidential Information. In operation, the present invention provides for retrieving a predefined dataset. Further, the present invention provides for extracting data values associated with selected relevant data fields from the retrieved predefined dataset. Furthermore, the present invention provides for defining rules for generating data values of specific data fields out of the selected relevant data fields. Yet further, the present invention provides for evaluating a number of possible data records. Yet further, the present invention provides for generating evaluated number of synthetic data records using a predefined file format based on the extracted data values and the defined rules.

Abstract: The present invention provides for generating in real-time synthetic test data comprising large volumes of data records associated with an entity for testing data processing applications. In operation, the present invention provides for generating a data structure, where the data structure is populated with predefined segments based on selected operating field. Each predefined segment comprises one or more sub-segments. The data values for each sub-segment is generated based on one or more parameters. Further, the present invention provides for evaluating combinations between data values of one or more sub-segments of one or more predefined segments. Yet further, synthetic test data comprising a plurality of data records is generated based on generated data structure and evaluated combinations, where each data record is populated with one or more sub-segments of the data structure, arranged within each data record and populated with data values based on the one or more parameters.

Abstract: A high-speed, high-resolution testing circuit for both analog and digital circuit packs is described. The testing circuit, which employs data compression techniques, comprises a shift register (22) having an overall length selectively variable under program control, and an arrangement (18) for combining incoming data signals with feedback signals out of predetermined stages of the shift register. The positions of the feedback taps of the variable length shift register are selectively variable under program control (24,26).