Abstract: A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.

Abstract: A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate including a superlattice. The superlattice may include a plurality of stacked groups of layers and a semiconductor cap layer on an uppermost group of layers. Each group of layers of the superlattice may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The MOSFET may further include source, drain, and gate regions defining a channel through at least a portion of the semiconductor cap layer.