Abstract: A flexible memory interface system includes a control module, instruction memory, a command processing unit, an address processing unit, and a data processing unit. The control module controls storing and retrieving of a command portion, an addressing portion, and data of an instruction to access memory to and from the instruction memory and the command processing unit, the address processing unit, and the data processing unit, respectively. The command processing unit is operably coupled to process a command portion of an instruction to access memory. The address processing unit is operably coupled to process an addressing portion of the instruction to access the memory. The data processing unit is operably coupled to process data conveyance to or from the external memory based on the instruction to access the memory.

Abstract: A power system includes a controller to control a switching power converter, and the controller is configured to automatically transition operation of the switching power converter, during each cycle of an input voltage to the switching power converter, between operating in discontinuous conduction mode and critical conduction mode.

Abstract: In at least one embodiment, a lighting system receives an input signal, such as a supply voltage, that can be affected by a dimmer. The supply voltage can be affected by a dimmer when, for example, a dimmer phase cut (i.e. chopped) the supply voltage. A dimmer detection system of the lighting system determines if a dimmer is affecting the supply voltage. In at least one embodiment, the dimmer detection system also determines a type of the dimmer, such as detecting if the dimmer is a leading edge or trailing edge dimmer. In at least one embodiment, the dimmer detection system provides dimmer type data to one or more other circuits such as a switching power converter controller. The one or more other circuits utilize the dimmer type data to affect their operation.

Abstract: According to systems and methods of this disclosure, a controller may be configured to: operate in a first compatibility mode of operation, determine from an input signal of the lamp assembly during operation in the first compatibility mode whether the first compatibility mode of operation provides compatibility between the lamp assembly and a power infrastructure to which it is coupled, select the first compatibility mode of operation from a plurality of modes of operation as a compatibility mode responsive to determining that the first compatibility mode of operation provides compatibility between the lamp assembly and a power infrastructure to which it is coupled, and select a second compatibility mode of operation from the plurality of modes of operation as the compatibility mode responsive to determining that the first compatibility mode of operation does not provide compatibility between the lamp assembly and the power infrastructure to which it is coupled.

Abstract: In at least one embodiment, a lighting system receives an input signal, such as a supply voltage, that can be affected by a dimmer. The supply voltage can be affected by a dimmer when, for example, a dimmer phase cut (i.e. chopped) the supply voltage. A dimmer detection system of the lighting system determines if a dimmer is affecting the supply voltage. In at least one embodiment, the dimmer detection system also determines a type of the dimmer, such as detecting if the dimmer is a leading edge or trailing edge dimmer. In at least one embodiment, the dimmer detection system provides dimmer type data to one or more other circuits such as a switching power converter controller. The one or more other circuits utilize the dimmer type data to affect their operation.

Abstract: A power measurement and calibration system provides power and line frequency measurements by using a bandpass filter having complex voltage and current outputs from which real and imaginary power components can be determined. Calibration of the filter may be omitted if a complex wavelet filter is used to implement the bandpass filter and a determination of line frequency can also be provided for downstream use. A processor receiving data from the output of the filter can compute real and imaginary power, power factor and the line frequency. The filter may be implemented by a processor executing program instructions, or a digital circuit implementing the filter and optionally a CORDIC rotator for computing the current-to-voltage phase relationship can provide input to the processor for power measurement and calibration of the sample rate to line frequency relationship and for other uses.

Abstract: A method and apparatus for automatically securing non-volatile (NV) storage in an integrated circuit provides improved resistance to code copying and reverse-engineering attacks. External interfaces that provide read access to the NV storage are be disabled, for a predetermined time after a reset or other initialization signal is received. An internal lock state bit or key is checked as well as an external lock prevent indication. If the lock prevent indication is not received, or the internal lock state bit is already set, then the integrated circuit is operated under a locked condition, in which external access to the NV storage values is prevented. The lock prevent indication may be a signal provided during reset of the integrated circuit on a terminal that is used for another purpose after initialization of the integrated circuit.

Abstract: The disclosure is directed to a computational device including functional circuitry, a transceiver interface that is accessible to the functional circuitry, and a universal serial bus transceiver that is accessible to the transceiver interface and that is configured to couple to a universal serial bus compatible media. The transceiver interface is configured to provide a first set of configuration data including a first power setting to a host device via the universal serial bus transceiver. The universal serial bus transceiver is configured to electrically disconnect from and electrically reconnect to the universal serial bus media in response to a suspension signal. The transceiver interface is also configured to provide a second set of configuration data including a second power setting after electrically reconnecting.

Abstract: A memory device has a plurality of memory blocks utilized to store data. One of the blocks is used as a hidden memory block to store an operating system program, instead of data. The hidden memory block is designated as a bad block so that data will not be written into the hidden memory block, but a tag associated with the hidden memory block identifies that the hidden memory block contains the operating system program.

Abstract: A memory device has a plurality of memory blocks utilized to store data. One of the blocks is used as a hidden memory block to store an operating system program, instead of data. The hidden memory block is designated as a bad block so that data will not be written into the hidden memory block, but a tag associated with the hidden memory block identifies that the hidden memory block contains the operating system program.

Abstract: The disclosure is directed to a computational device including functional circuitry, a transceiver interface that is accessible to the functional circuitry, and a universal serial bus transceiver that is accessible to the transceiver interface and that is configured to couple to a universal serial bus compatible media. The transceiver interface is configured to provide a first set of configuration data including a first power setting to a host device via the universal serial bus transceiver. The universal serial bus transceiver is configured to electrically disconnect from and electrically reconnect to the universal serial bus media in response to a suspension signal. The transceiver interface is also configured to provide a second set of configuration data including a second power setting after electrically reconnecting.

Abstract: An internal memory uses a resource identifier to identify which functional program from an external memory is to be loaded into an overlay space of the internal memory. In executing a program statement of a main program to perform a particular functional operation without identifying a corresponding functional program, a prelude stored in a prelude space of the internal memory provides a resource identifier for the functional operation. The resource identifier identifies a corresponding functional program to perform the particular functional operation and the identified functional program is then loaded into the overlay space to be executed.

Abstract: A memory device has a plurality of memory blocks utilized to store data. One of the blocks is used as a hidden memory block to store an operating system program, instead of data. The hidden memory block is designated as a bad block so that data will not be written into the hidden memory block, but a tag associated with the hidden memory block identifies that the hidden memory block contains the operating system program.

Abstract: An internal memory uses a resource identifier to identify which functional program from an external memory is to be loaded into an overlay space of the internal memory. In executing a program statement of a main program to perform a particular functional operation without identifying a corresponding functional program, a prelude stored in a prelude space of the internal memory provides a resource identifier for the functional operation. The resource identifier identifies a corresponding functional program to perform the particular functional operation and the identified functional program is then loaded into the overlay space to be executed.

Abstract: The present invention relates to an optical system for an apparatus for multi-part differential particle discrimination to facilitate analysis, classification, and sorting of various fluid components for presentation. The optical system is characterized by one or more of the following: a synchronized illumination beam and flow cell conduit, a flow cell arrangement to control back reflection, and light sensor arrangement to particularly gather a specific range of light scatter, such specific range of light scatter directly corresponding to at least one type of particle capable of being identified by the apparatus.

Abstract: The present invention relates to an optical system for an apparatus for multi-part differential particle discrimination to facilitate analysis, classification, and sorting of various fluid components for presentation. The optical system is characterized by one or more of the following: a synchronized illumination beam and flow cell conduit, a flow cell arrangement to control back reflection, and light sensor arrangement to particularly gather a specific range of light scatter, such specific range of light scatter directly corresponding to at least one type of particle capable of being identified by the apparatus.