Abstract: The invention pertains to a method for the selective etching of a surface layer which is automatically stopped at a subjacent layer.According to the invention, a first layer of a material containing gallium is selectively etched with respect to a second layer containing aluminium by reactive ion etching in the presence of a pure freon plasma C Cl.sub.2 F.sub.2. At low pressures (0.5 to 2.5 pascals), the etching is anisotropic and makes it possible to etch the gate recess of a field effect transistor. At a higher pressure (6 to 10 pascals), the etching is isotropic and makes it possible to sub-etch the first layer.Application to the manufacture of field effect transistors made of group III-V materials, with low access resistances.

Abstract: A method is provided for forming metallizations on a semiconductor component, which are closer together than is possible with the present day masking technology.In accordance with the invention, a pattern of minimum dimensions is defined in a mask by means of two openings. This pattern is underetched, either by light over-exposure, or by particle back-scattering. Two metallizations are deposited, directionally in the bottom of the openings then a dielectric layer is deposited, non directionally, on the metallizations, the mask is removed by dissolution.

Abstract: An epitaxial structure in which a constraint imposed by forced epitaxy causes an increase in the piezoelectric effect of a group of layers. The structure which provides this effect utilizes a semi-insulating substrate made from a first material on which is deposited by forced epitaxy a layer of a second material, the two materials are in crystalline mesh parameter disharmony, which creates in said layer a constraint increasing its piezoelectricity. On the constrained layer are deposited two groups of alternated "deforming" and "deformed" layers of the two materials. The thickness of the structure is sufficient to allow propagation of the surface waves. The advantage of this structure is that it allows two transducers such as transistors to be integrated on or at the side of this structure.