Abstract: A device for storing information in an optical fiber transmission system, the storage of information, in particular in the form of digital data, being provided by creating at least one circulating memory using the optical fiber connecting terminals together as delay line. The transmissions takes place at a first wave length and each circulating memory uses a particular wave length, different from that of the other memories and from the transmission wave length. Each memory comprises, in a first terminal, a light source, a detector and a multiplexer for coupling with the connecting optical fiber and, in the terminal which is coupled thereto, a dichroic mirror selectively reflecting the wave lengths of the circulating memories and transmitting the other wave lengths.

Abstract: An addressing unit for accessing two sequences of instructions quasi-simultaneously, the two sequences of instructions being prerecorded in a single memory. Addresses for the two sequences appear alternately at the address output of the addressing unit at a predetermined clock rate. During a single clock period, the addressing unit receives data for calculating the next address in the first sequence while it is calculating the address of the next instruction in the second sequence. In the following clock period the addressing unit calculates the address of the next instruction in the first sequence while it is receiving data for calculating the address of the next instruction in the second sequence, and so on. In this manner, the unit is simultaneously receiving data for one sequence and calculating an address for the other sequence.

Abstract: A microprogrammable control unit to be associated with a memory in which there have been pre-recorded two sequences of micro-instructions relating to two faces (digital systems) to be coupled and to outside resources adapted to emit control signals necessary for these two digital systems is provided. The control unit comprises at least an addressing unit for the memory adapted to the quasi-simultaneous operation of the two sequences, internal resources comprising at least for each face an input register, an output register of data and a counter and common to the two faces a multiplexer of the signals indicating the states of the internal resources and of the external resources, instruction registers for memorizing codes furnished by the micro-instruction extracted from the memory and a transcoding device controlling the resources, the addressing unit and the multiplexer as a function of the codes of micro-instructions with which data are associated.