Abstract: A state of charge of a battery is estimated in several iterations, each iteration including: acquiring a measurement of intensity of current supplied by the battery, acquiring a measurement of voltage supplied by the battery, estimating a first state of charge of the battery based on a first estimated state of charge obtained upon a previous iteration and on the current intensity measurement, estimating a value of intensity of current supplied by the battery based on the voltage measurement and on a state of charge of the battery obtained upon the previous iteration, and calculating a corrected state of charge by adding to the first estimated state of charge a corrective term obtained by the product of a first correction gain multiplied by a factor representative of a difference between the estimated and measured current intensities.

Abstract: A method for measuring the voltage of a battery of an electronic device by means of a measurement device integrated to the electronic device, wherein, after the connection of the battery to the electronic device, the measurement device prevents battery charge and discharge operations during the measurement.

Abstract: A state of charge of a battery is estimated in several iterations, each iteration including: acquiring a measurement of intensity of current supplied by the battery, acquiring a measurement of voltage supplied by the battery, estimating a first state of charge of the battery based on a first estimated state of charge obtained upon a previous iteration and on the current intensity measurement, estimating a value of intensity of current supplied by the battery based on the voltage measurement and on a state of charge of the battery obtained upon the previous iteration, and calculating a corrected state of charge by adding to the first estimated state of charge a corrective term obtained by the product of a first correction gain multiplied by a factor representative of a difference between the estimated and measured current intensities.

Abstract: There is provided a controller for a DC motor drive transistor which controls a parameter of a motor, the transistor being of PNP or NPN type, and the controller comprising a detection circuit, adapted to determine whether the DC motor drive transistor is of the PNP or NPN type and a driver circuit, adapted to sink current from the PNP transistor if it is determined that a PNP transistor is present, or source current into the NPN transistor if it is determined that an NPN transistor is present.

Abstract: In a computer network having a central computer, a plurality of peripheral computers, and a time-shared common memory accessible to the network computers over a single bus connected to the common memory, an electronic switch of the telephone type is connected to all of the computers so that direct links may be established between respective members of one or more selected pairs of computers. Data is transmitted between computers via the direct links effected by the switch, and the bus is thus primarily reserved for access to the main memory for each of the computers. Direct links for transmitting data from a peripheral computer and another computer are established in accordance with connection orders sent from the peripheral computer to the central computer via the common memory. If the other computer is available to receive data, the central computer instructs the electronic switch to connect the peripheral computer directly to the receiving computer.

Abstract: The present invention incudes a searching circuit which sequentially accesses a plurality of peripheral computers to receive requests for access by these computers to a principal memory normally occupied by a principal computer. The searching circuit determines the identity of the requesting computer and passes the request on to a decision circuit which receives information from the principal computer and the peripheral computers as to the state of occupancy of the access bus to the principal memory. If the bus is not occupied and the principal computer does not require use of the principal memory, the request is granted by the decision circuit.