Patents by Inventor Jean-François Nodin

Jean-François Nodin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220399496
    Abstract: An OxRAM resistive memory cell includes a lower electrode, an upper electrode, and an active layer which extends between the lower electrode and the upper electrode. The active layer includes a layer of a first electrically insulating oxide, wherein an electrically conductive filament can be formed, then subsequently broken and reformed several times successively. The upper electrode includes a reservoir layer, capable of receiving oxygen, which includes an upper part made of a metal and a lower part made of a second oxide, the second oxide being an oxide of the metal and including a proportion of oxygen such that the second oxide is electrically conductive.
    Type: Application
    Filed: November 17, 2020
    Publication date: December 15, 2022
    Inventors: Gabriel MOLAS, Thomas MAGIS, Jean-François NODIN, Alessandro BRICALLI, Guiseppe PICCOLBONI, Yifat COHEN, Amir REGEV
  • Publication number: 20220336744
    Abstract: A method for manufacturing an OxRAM type resistive memory cell including a silicon oxide layer, the method including determining manufacturing parameter values enabling the resistive memory cell to have an initial resistance between 107? and 3·109?; and forming on a substrate a stack successively including a first electrode, the silicon oxide layer and a second electrode, by applying the manufacturing parameter values.
    Type: Application
    Filed: June 11, 2020
    Publication date: October 20, 2022
    Inventors: Gabriel MOLAS, Guiseppe PICCOLBONI, Amir REGEV, Gaël CASTELLAN, Jean-François NODIN
  • Publication number: 20220336017
    Abstract: A method for determining a value of a manufacturing parameter of a resistive memory cell, the resistive memory cell including a stack of layers, includes providing reference memory cells corresponding to technological alternatives of the stack of layers; measuring for each reference memory cell an initial resistance value; determining for each reference memory c ell a programming parameter value selected from among the resistance in a high resistance state and the programming window; establishing a relationship between the programming parameter and the initial resistance from the initial resistance values and the programming parameter values; and determining the manufacturing parameter value for which the programming parameter is greater than or equal to a target value, from the relationship between the programming parameter and the initial resistance and from a dependency relationship between the initial resistance and the manufacturing parameter.
    Type: Application
    Filed: June 11, 2020
    Publication date: October 20, 2022
    Inventors: Gabriel MOLAS, Guiseppe PICCOLBONI, Amir REGEV, Gaël CASTELLAN, Jean-François NODIN
  • Patent number: 11393876
    Abstract: A three dimensional memory includes flat electrodes, each defining a plane; a vertical electrode, extending essentially along an axis perpendicular to the plane defined by each flat electrode; floating electrodes, each situated between a flat electrode and the vertical electrode; first layers of an insulating material, each flat electrode being separated from the preceding and/or following flat electrode by a first layer of an insulating material; first layers of a first active material, each layer of an active material separating a flat electrode from the floating electrode that is associated therewith; a second layer of a second active material separating the vertical electrode from the floating electrodes. The first active material forms a selector or a memory point and the second active material forms a memory point or a selector. Each flat electrode includes first, second and third sub-layers made of, respectively, first, second and third conductive materials.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: July 19, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Khalil El Hajjam, Gabriel Molas, Jean-François Nodin
  • Publication number: 20220148653
    Abstract: The present disclosure relates to a memory circuit comprising: a transistor layer; a plurality of first memory elements positioned in a first level above the transistor layer; and a plurality of filament switching resistive memory elements positioned in a second level higher than the first level.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 12, 2022
    Inventors: Elisa VIANELLO, Jean-François NODIN
  • Publication number: 20200411592
    Abstract: A three dimensional memory includes flat electrodes, each defining a plane; a vertical electrode, extending essentially along an axis perpendicular to the plane defined by each flat electrode; floating electrodes, each situated between a flat electrode and the vertical electrode; first layers of an insulating material, each flat electrode being separated from the preceding and/or following flat electrode by a first layer of an insulating material; first layers of a first active material, each layer of an active material separating a flat electrode from the floating electrode that is associated therewith; a second layer of a second active material separating the vertical electrode from the floating electrodes. The first active material forms a selector or a memory point and the second active material forms a memory point or a selector. Each flat electrode includes first, second and third sub-layers made of, respectively, first, second and third conductive materials.
    Type: Application
    Filed: December 18, 2018
    Publication date: December 31, 2020
    Inventors: Khalil EL HAJJAM, Gabriel MOLAS, Jean-François NODIN
  • Patent number: 10741757
    Abstract: The disclosed process includes the successive stages of providing a substrate comprising a dielectric layer; forming a first layer of block copolymers on a part of the dielectric layer, so that the dielectric layer exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the dielectric layer; removing the first layer of block copolymers; forming a first electrode on the structured dielectric layer; forming a memory layer, of resistive memory type, on the first electrode; forming a second electrode on the memory layer; forming a second layer of block copolymers on a part of the second electrode, so that the second electrode exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the second electrode; and removing the second layer of block copolymers.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: August 11, 2020
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Elisa Vianello, Selina La Barbera, Jean-Francois Nodin, Raluca Tiron
  • Publication number: 20190393412
    Abstract: The disclosed process includes the successive stages of providing a substrate comprising a dielectric layer; forming a first layer of block copolymers on a part of the dielectric layer, so that the dielectric layer exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the dielectric layer; removing the first layer of block copolymers; forming a first electrode on the structured dielectric layer; forming a memory layer, of resistive memory type, on the first electrode; forming a second electrode on the memory layer; forming a second layer of block copolymers on a part of the second electrode, so that the second electrode exhibits free zones with a random spatial distribution; etching the free zones, so as to structure the second electrode; and removing the second layer of block copolymers.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 26, 2019
    Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Elisa VIANELLO, Selina La Barbera, Jean-Francois Nodin, Raluca Tiron
  • Patent number: 9209391
    Abstract: An electronic device includes a first electrode made of an inert material; a second electrode made of a soluble material; a solid electrolyte made of an ion-conductive material, wherein the first and second electrodes are in contact respectively with one of the faces of the electrolyte, either side of the electrolyte, wherein the second electrode supplies mobile ions flowing in the electrolyte towards the first electrode, to form a conductive filament when a voltage is applied between the first and second electrodes. The second electrode is a confinement electrode that includes an end surface in contact with the electrolyte which is less than the available surface of the electrolyte, such that confinement of the contact area of the confinement electrode on the solid electrolyte is obtained.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: December 8, 2015
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Gabriel Molas, Jean-François Nodin
  • Patent number: 9018614
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a central region laterally surrounded with a peripheral region, the crystallization and melting temperatures of the central region being respectively lower than those of the peripheral region.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: April 28, 2015
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Patent number: 8958234
    Abstract: An electronic device includes a first electrode, a second electrode and a solid electrolyte having a base of an ion conducting material. The device remains in the highly resistive state for as long as a first threshold voltage between the first electrode and the second electrode is not reached. The device switches from the state of high resistance to the state of low resistance when the potential difference between the first electrode and the second electrode is equal to or greater than the first threshold voltage. The device switches from the state of low resistance to the state of high resistance when the potential difference between the first electrode and the second electrode equal to or greater than this first threshold voltage is removed and as it decreases it reaches a second positive voltage threshold strictly lower than the first threshold voltage.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: February 17, 2015
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventor: Jean-François Nodin
  • Patent number: 8759808
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a first region adjacent to a second region itself adjacent to at least one third region, the first, second, and third regions each extending from the upper electrode to the lower electrode, the crystallization temperature of the second region ranging between that of the first region and that of the third region, and the melting temperatures of the first, second, and third regions being substantially identical.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: June 24, 2014
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Publication number: 20140145141
    Abstract: An electronic device includes a first electrode made of an inert material; a second electrode made of a soluble material; a solid electrolyte made of an ion-conductive material, wherein the first and second electrodes are in contact respectively with one of the faces of the electrolyte, either side of the electrolyte, wherein the second electrode supplies mobile ions flowing in the electrolyte towards the first electrode, to form a conductive filament when a voltage is applied between the first and second electrodes. The second electrode is a confinement electrode that includes an end surface in contact with the electrolyte which is less than the available surface of the electrolyte, such that confinement of the contact area of the confinement electrode on the solid electrolyte is obtained.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 29, 2014
    Inventors: Gabriel MOLAS, Jean-François Nodin
  • Publication number: 20140070163
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a first region adjacent to a second region itself adjacent to at least one third region, the first, second, and third regions each extending from the upper electrode to the lower electrode, the crystallization temperature of the second region ranging between that of the first region and that of the third region, and the melting temperatures of the first, second, and third regions being substantially identical.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicants: Commissariat à I'Énergie Atomique et aux Énergies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Publication number: 20140070158
    Abstract: A memory cell including a via made of a phase-change material arranged between a lower electrode and an upper electrode, wherein the via includes a central region laterally surrounded with a peripheral region, the crystallization and melting temperatures of the central region being respectively lower than those of the peripheral region.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicants: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Francois Nodin, Veronique Sousa, Sandrine Lhostis
  • Publication number: 20120250395
    Abstract: An electronic device includes a first electrode, a second electrode and a solid electrolyte having a base of an ion conducting material. The device remains in the highly resistive state for as long as a first threshold voltage between the first electrode and the second electrode is not reached. The device switches from the state of high resistance to the state of low resistance when the potential difference between the first electrode and the second electrode is equal to or greater than the first threshold voltage. The device switches from the state of low resistance to the state of high resistance when the potential difference between the first electrode and the second electrode equal to or greater than this first threshold voltage is removed and as it decreases it reaches a second positive voltage threshold strictly lower than the first threshold voltage.
    Type: Application
    Filed: April 3, 2012
    Publication date: October 4, 2012
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Jean-François Nodin
  • Patent number: 8148709
    Abstract: This magnetic device integrates a magneto-resistive stack, the stack comprising at least two layers made out of a ferromagnetic material, separated from each other by a layer of non-magnetic material; and means for causing an electron current to flow perpendicular to the plane of the layers, with at least one integrated nano-contact intended to inject the current into the magneto-resistive stack. The nano-contact is made in a bilayer composed of a solid electrolyte on which has been deposited a soluble electrode composed of a metal that has been at least partially dissolved in the electrolyte.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: April 3, 2012
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bertrand Delaet, Marie-Claire Cyrille, Jean-François Nodin, Véronique Sousa
  • Patent number: 8098105
    Abstract: This radio-frequency oscillator includes a magnetoresistive device in which an electric current is able to flow. The magnetoresistive device includes a first magnetic layer, known as a “trapped layer”, whereof the magnetization is of fixed direction. The magnetoresistive device further includes a second magnetic layer known as a “free layer” and a non-magnetic layer, known as an “intermediate layer”, interposed between the first and second layer, known as the intermediate layer. The oscillator further includes means capable of causing an electron current to flow in said layers constituting the aforementioned stack and in a direction perpendicular to the plane which contains said layers. One of the three layers constituting the magnetoresistive device includes at least one constriction zone of the electric current passing through it.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: January 17, 2012
    Assignee: Commissariat à I'Energie Atomique
    Inventors: Marie-Claire Cyrille, Bertrand Delaet, Jean-Francois Nodin, Veronique Sousa
  • Publication number: 20100134196
    Abstract: This radio-frequency oscillator includes a magnetoresistive device in which an electric current is able to flow. The magnetoresistive device includes a first magnetic layer, known as a “trapped layer”, whereof the magnetization is of fixed direction. The magnetoresistive device further includes a second magnetic layer known as a “free layer” and a non-magnetic layer, known as an “intermediate layer”, interposed between the first and second layer, known as the intermediate layer. The oscillator further includes means capable of causing an electron current to flow in said layers constituting the aforementioned stack and in a direction perpendicular to the plane which contains said layers. One of the three layers constituting the magnetoresistive device includes at least one constriction zone of the electric current passing through it.
    Type: Application
    Filed: November 18, 2009
    Publication date: June 3, 2010
    Applicant: Commissariat A L'Energie Atomique
    Inventors: Marie-Claire Cyrille, Bertrand Delaet, Jean-Francois Nodin, Veronique Sousa
  • Publication number: 20100097735
    Abstract: A device for protecting at least one integrated circuit against an electrostatic discharge, comprising at least: a portion of ionisable metal, a solid electrolyte arranged against the portion of ionisable metal and comprising metal ions of nature similar to the metal of said portion of ionisable metal, an electrode electrically connected to the solid electrolyte, and in which the concentration of metal ions in the solid electrolyte is less than the saturation concentration of metal ions in the solid electrolyte.
    Type: Application
    Filed: September 1, 2009
    Publication date: April 22, 2010
    Applicant: COMMISSARIAT A L' ENERGIE ATOMIQUE
    Inventor: Jean-François NODIN