Patents by Inventor Jean-Francois Sautereau

Jean-Francois Sautereau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5136193
    Abstract: A limiter circuit having a field effect transistor whose bias circuit is constituted by two constant voltage feeds: one for its gate and the other for its drain, with a resistive load being connected in series with the feed to the gate of the transistor. The invention is particularly applicable to space telecommunications.
    Type: Grant
    Filed: March 13, 1991
    Date of Patent: August 4, 1992
    Assignee: Alcatel Espace
    Inventors: Michel Pouysegur, Thierry Parra, Michel Gayral, Jacques Graffeuil, Jean-Francois Sautereau