Abstract: A method of fabricating a thin film transistor array panel for a liquid crystal display is provided. A gate line assembly is formed on an insulating substrate. The gate line assembly includes gate lines and gate electrodes connected to the gate lines. A gate insulating layer is formed on the insulating substrate having the gate line assembly. A semiconductor layer is formed on the gate insulating layer. A data line assembly is formed, the data line assembly includes data lines crossing over the gate lines, source electrodes connected to the data lines and placed adjacent to the gate electrodes, and drain electrodes placed opposite to the source electrodes with respect to the gate electrodes. A protective layer is deposited onto the insulating substrate having the data line assembly. The protective layer is patterned to form first contact holes exposing the drain electrodes.

Abstract: A method of fabricating a thin film transistor array panel for a liquid crystal display is provided. A gate line assembly is formed on an insulating substrate. The gate line assembly includes gate lines and gate electrodes connected to the gate lines. A gate insulating layer is formed on the insulating substrate having the gate line assembly. A semiconductor layer is formed on the gate insulating layer. A data line assembly is formed, the data line assembly includes data lines crossing over the gate lines, source electrodes connected to the data lines and placed adjacent to the gate electrodes, and drain electrodes placed opposite to the source electrodes with respect to the gate electrodes. A protective layer is deposited onto the insulating substrate having the data line assembly. The protective layer is patterned to form first contact holes exposing the drain electrodes.

Abstract: In an image recognition apparatus and an LCD apparatus having the same, a plurality of gate lines arranged in a transparent substrate has a predetermined slope such that the gate lines intersect with two sides of the transparent substrate, which are adjacent to or facing each other. A plurality of sensing signal output line arranged in the transparent substrate is substantially perpendicular to the gate lines. An image recognition sensor is formed on a pixel area defined by the gate and sensing signal output lines adjacent to each other. The image recognition sensor senses an image pattern of an object in response to gate driving signals from the gate lines and outputs the sensed image pattern through the sensing signal output lines. Accordingly, the LCD apparatus may prevent appearance of the moire image and deterioration of the display quality of the LCD panel.

Abstract: A method of fabricating a thin film transistor array panel for a liquid crystal display is provided. A gate line assembly is formed on an insulating substrate. The gate line assembly includes gate lines and gate electrodes connected to the gate lines. A gate insulating layer is formed on the insulating substrate having the gate line assembly. A semiconductor layer is formed on the gate insulating layer. A data line assembly is formed, the data line assembly includes data lines crossing over the gate lines, source electrodes connected to the data lines and placed adjacent to the gate electrodes, and drain electrodes placed opposite to the source electrodes with respect to the gate electrodes. A protective layer is deposited onto the insulating substrate having the data line assembly. The protective layer is patterned to form first contact holes exposing the drain electrodes.

Abstract: Gate wire is formed on a transparent glass substrate, and a gate insulating film, an amorphous silicon layer, a doped amorphous silicon layer and Cr layer are deposited in sequence. After patterning the Cr layer, the doped amorphous silicon layer and the amorphous silicon layer, an ITO (indium-tin-oxide) layer is deposited and patterned, and then the exposed portions of the Cr layer and of the doped amorphous silicon layer are removed. A passivation film is deposited and patterned to form a plurality of contact holes over the ITO layer, and then a conductive layer is deposited and patterned to form a data line which is connected to the ITO layer through the contact holes.