Abstract: In a video system, a method and system for design verification of video processing systems with unbalanced data flow are provided. Efficient design verification may be provided for multi-field video processors with separate control data flow and video data flow. A design verification architecture may utilize a reference model to generate test and expected data for a controller and/or a data processor in a multi-field video processor hardware model. The design verification architecture may provide test data via stimulus feeders and may compare simulated and expected data in result checkers. When the controller is selected for verification, the design verification architecture may verify the operation and design of the multi-field video processor control data flow implementation. When the data processor is selected for verification, the design verification architecture may verify the operation and design of the multi-field video processor video data flow implementation.

Abstract: An method for analyzing irreversible apneic coma (IAC) for determining the presence of irreversible apneic coma (IAC) by analyzing the heart rate variability of a brain traumatic patient, thereby providing a physician a reference index to determine whether brain death has occurred. This method includes, at first, recording an electrocardiogram (ECG) from a subject. Then, analyzing R-R interval in said electrocardiogram (ECG), and plotting said R-R interval into Poincaré plot, wherein the X coordinate in said Poincaré plot represents R-R interval(n), and n is a 1˜data number. Y coordinate in said Poincaré plot represents RR(n+1). And, finally, quantifying said Poincaré plot, and obtaining semi-major axis (SD1), semi-minor axis (SD2), and SD1/SD2 of said Poincaré plot, as well as Poincaré plot area.

Abstract: Various aspects of the low cost line buffer system allow a reduction in circuitry versus conventional approaches to line buffer design. A plurality of line buffers such that the output of one line buffer in the plurality of line buffers may be coupled to an input of a succeeding line buffer in the plurality of line buffers. A first line buffer in the plurality of line buffers may be coupled to an input write data signal, while the width of a subsequent plurality of line buffers may be less than or equal to the width of the previous line buffers in the plurality of line buffers.

Abstract: A secure point-of-sale (POS) portal architecture for delivering multiple services is provided. According to one exemplary aspect of the architecture, a number of services offered by various parties are integrated for delivery to merchants. The parties offering the services include, for example, payment processors and merchant acquirers and other external value-added service providers. The integrated services, in turn, are offered to merchants and/or their respective customers via one or more POS devices and its supporting system infrastructure at the merchant locations. The integrated services include, for example, acceptance of multiple payment instruments, payment processing, user dialog management, sales promotion and customer support, loyalty programs, back office processing, receipt capture, employee training, risk management, dispute resolution, system security, system administration etc.

Abstract: A payment system for facilitating a payment transaction between a payer and a payee is disclosed. The payment system includes a payer access device, a payee access device, and a services hub. The services hub is configured to communicate with the payer device and the payee device; maintain information relating to a payer account and access device information associated with the payer account, the payer account being linked to the access device; generate a tracer ticket in response to a request issued by the payer using either the payer device or the payee device, the tracer ticket containing information relating to the payment transaction; validate the access devices; and authorize the payment transaction against the payer account through conventional payment processing systems. Upon receiving the request from the payee device for the tracer ticket, the services hub generates the tracer ticket and forwards a copy thereof to the payer via the payee device.

Abstract: A payment system for facilitating a payment transaction between a payer and a payee is disclosed. The payment system includes a payer access device, a payee access device, and a services hub. The services hub is configured to communicate with the payer device and the payee device; maintain information relating to a payer account and access device information associated with the payer account, the payer account being linked to the access device; generate a tracer ticket in response to a request issued by the payer using either the payer device or the payee device, the tracer ticket containing information relating to the payment transaction; validate the access devices; and authorize the payment transaction against the payer account through conventional payment processing systems. Upon receiving the request from the payee device for the tracer ticket, the services hub generates the tracer ticket and forwards a copy thereof to the payer via the payee device.

Abstract: A payment system for facilitating a payment transaction between a payer and a payee is disclosed. The payment system includes a payer access device, a payee access device, and a services hub. The services hub is configured to communicate with the payer device and the payee device; maintain information relating to a payer account and access device information associated with the payer account, the payer account being linked to the access device; generate a tracer ticket in response to a request issued by the payer using either the payer device or the payee device, the tracer ticket containing information relating to the payment transaction; validate the access devices; and authorize the payment transaction against the payer account through conventional payment processing systems. Upon receiving the request from the payee device for the tracer ticket, the services hub generates the tracer ticket and forwards a copy thereof to the payer via the payee device.

Abstract: A payment system for facilitating a payment transaction between a payer and a payee is disclosed. The payment system includes a payer access device, a payee access device, and a services hub. The services hub is configured to communicate with the payer device and the payee device; maintain information relating to a payer account and access device information associated with the payer account, the payer account being linked to the access device; generate a tracer ticket in response to a request issued by the payer using either the payer device or the payee device, the tracer ticket containing information relating to the payment transaction; validate the access devices; and authorize the payment transaction against the payer account through conventional payment processing systems. Upon receiving the request from the payee device for the tracer ticket, the services hub generates the tracer ticket and forwards a copy thereof to the payer via the payee device.

Abstract: A secure point-of-sale (POS) portal architecture for delivering multiple services is provided. According to one exemplary aspect of the architecture, a number of services offered by various parties are integrated for delivery to merchants. The parties offering the services include, for example, payment processors and merchant acquirers and other external value-added service providers. The integrated services, in turn, are offered to merchants and/or their respective customers via one or more POS devices and its supporting system infrastructure at the merchant locations. The integrated services include, for example, acceptance of multiple payment instruments, payment processing, user dialog management, sales promotion and customer support, loyalty programs, back office processing, receipt capture, employee training, risk management, dispute resolution, system security, system administration etc.

Abstract: In a video system, a method and system for design verification of video processing systems with unbalanced data flow are provided. Efficient design verification may be provided for multi-field video processors with separate control data flow and video data flow. A design verification architecture may utilize a reference model to generate test and expected data for a controller and/or a data processor in a multi-field video processor hardware model. The design verification architecture may provide test data via stimulus feeders and may compare simulated and expected data in result checkers. When the controller is selected for verification, the design verification architecture may verify the operation and design of the multi-field video processor control data flow implementation. When the data processor is selected for verification, the design verification architecture may verify the operation and design of the multi-field video processor video data flow implementation.

Abstract: A system and method that repeat video images in a deinterlacing system. The method comprises detecting a signal requesting an input video image be repeated and determining the desired number of repetitions. The input video image may then be processed to generate an output video image and the output video image may be repeated the desired number of repetitions. The input video images following the repeated image may be held until the repeating is completed, and may then be processed and displayed. Repeating the video image may be utilized to achieve different playback modes such as, for example, slow motion, pause, and video rate conversion.

Abstract: In a video system, a method and system for efficient design verification of a motion adaptive deinterlacer (MAD) are provided. A MAD reference model may be configured via a configuration file to generate test parameters for the verification of a MAD hardware model. Test-bench interface drivers and a verification monitor may be utilized to transfer test parameters to the MAD hardware model and to verify simulated results. Modes of verification may comprise a normal mode, a pixel processing mode, and a field controller mode. During the normal mode, simulated pixel information and register settings generated by the pixel processor and field controller in the MAD hardware model may be compared to expected pixel information and register settings generated by the MAD reference model. During the pixel processing mode, expected and simulated pixel information may be compared. During the field controller mode, expected and simulated register settings may be compared.

Abstract: Various aspects of the low cost line buffer system allow a reduction in circuitry versus conventional approaches to line buffer design. A plurality of line buffers such that the output of one line buffer in the plurality of line buffers may be coupled to an input of a succeeding line buffer in the plurality of line buffers. A first line buffer in the plurality of line buffers may be coupled to an input write data signal, while the width of a subsequent plurality of line buffers may be less than or equal to the width of the previous line buffers in the plurality of line buffers.

Abstract: A payment system for facilitating a payment transaction between a payer and a payee is disclosed. The payment system includes a payer access device, a payee access device, and a services hub. The services hub is configured to communicate with the payer device and the payee device; maintain information relating to a payer account and access device information associated with the payer account, the payer account being linked to the access device; generate a tracer ticket in response to a request issued by the payer using either the payer device or the payee device, the tracer ticket containing information relating to the payment transaction; validate the access devices; and authorize the payment transaction against the payer account through conventional payment processing systems. Upon receiving the request from the payee device for the tracer ticket, the services hub generates the tracer ticket and forwards a copy thereof to the payer via the payee device.

Abstract: A pixel-data processing circuit delivers a fixed number of pixels to a video processing stage using an irregular sampling pattern that is defined by a variably-definable sampling window. In one example embodiment directed to processing an input stream of pixels corresponding to an array of video pixels, the window size is selected from one of various options for sampling subsets of the array as a two-dimensional window that spans the pixels in the array. A sampling-window is used such that the window size is a multiple of the sampling-window size and the sampling-window size defines the fixed number of pixels.