Abstract: An amplifier assembly includes a three or more way Doherty amplifier arrangement (DAA) having at least three amplifiers, including a main amplifier and at least two peak amplifiers. The DAA is within a dual-path package including a first-RF-input-lead and a second-RF-input-lead for receiving components of a split RF-input signal and providing the components to the DAA. A first-RF-output-lead and a second-RF-output-lead receive a split output signal from the DAA. The DAA includes a first-semiconductor-die and a second-semiconductor-die, each having thereon respective amplifier(s). The first-semiconductor-die includes a Doherty-splitter element splitting the RF-input signal from the first-RF-input-lead to provide an input to two amplifiers thereon and a Doherty-combiner element to combine an output from the two amplifiers. The Doherty-combiner element is connected to the first-RF-output-lead.

Abstract: A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a ?90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.

Abstract: A die is described comprising at least one 3-way Doherty amplifier comprising a main stage, a first peak stage and a second peak stage. An input is connected to an input network which is connected to the main stage, first peak stage and second peak stage. The input network includes a first impedance connected to an input of the first peak stage and providing a ?90° phase shift and a second impedance connected to an input of the second peak stage and providing a 90° phase shift. An output is connected to an output network which is connected to the main stage, first peak stage and second peak stage. The output network includes a third impedance connected to the output of the first peak stage and providing a 180° phase shift and a fourth impedance connected to the output of the main stage and providing a 90° phase shift.

Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.

Abstract: An amplifier assembly includes a three or more way Doherty amplifier arrangement (DAA) having at least three amplifiers, including a main amplifier and at least two peak amplifiers. The DAA is within a dual-path package including a first-RF-input-lead and a second-RF-input-lead for receiving components of a split RF-input signal and providing the components to the DAA. A first-RF-output-lead and a second-RF-output-lead receive a split output signal from the DAA. The DAA includes a first-semiconductor-die and a second-semiconductor-die, each having thereon respective amplifier(s). The first-semiconductor-die includes a Doherty-splitter element splitting the RF-input signal from the first-RF-input-lead to provide an input to two amplifiers thereon and a Doherty-combiner element to combine an output from the two amplifiers. The Doherty-combiner element is connected to the first-RF-output-lead.

Abstract: An integrated Doherty amplifier structure comprising; a main amplifier stage; at least one peak amplifier stage; an output combination bar configured to receive and combine an output from both the main amplifier stage and the or each peak amplifier stage; a main connection configured to connect an output of the main amplifier stage to the combination bar, the main connection comprising, at least in part, a bond wire forming a first inductance; a peak connection configured to connect an output of the peak amplifier stage to the combination bar; wherein the main connection connects to the combination bar at a first point along the bar and the peak connection connects to the combination bar at a second point along the bar spaced from the first point and the main amplifier stage is located further from the output combination bar than the at least one peak amplifier stage.

Abstract: An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at a first voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at a different second voltage level. Finally, when the SMPA branch receives a different third combination of drive signals, it produces the output signal at a voltage level of substantially zero. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states.

Abstract: The invention relates to a Doherty amplifier for amplifying an input signal at an operating frequency, comprising: a main amplifier; a first peak amplifier; a second peak amplifier, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal, a plurality of peak amplifiers, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal; a first input phase shifter; a second input phase shifter; a first capacitor coupled between the source and drain of the first peak amplifier; a first output phase shifter and a second output phase shifter.

Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits may employ a baseband decoupling network connected in parallel with a low-pass RF matching network of the amplifier circuit.

Abstract: A Doherty amplifier for amplifying an input signal to an output signal, the Doherty amplifier comprising: a main amplifier for receiving a first signal and for amplifying the first signal to generate a first amplified signal; a first peak amplifier for receiving a second signal and for generating a second amplified signal, the first peak amplifier only operating when the second signal has reached a first threshold power, the first and second signal split from the input signal; and output circuitry to combine the first and second amplified signals to generate an output signal having an operating bandwidth, the output circuitry comprising inductors arranged in the format of a branch line coupler, the inductors coupled to the output parasitic capacitances of the main and peak amplifier.

Abstract: An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at a first voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at a different second voltage level. Finally, when the SMPA branch receives a different third combination of drive signals, it produces the output signal at a voltage level of substantially zero. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states.

Abstract: The invention relates to a Doherty amplifier for amplifying an input signal at an operating frequency, comprising: a main amplifier; a first peak amplifier; a second peak amplifier, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal, a plurality of peak amplifiers, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal; a first input phase shifter; a second input phase shifter; a first capacitor coupled between the source and drain of the first peak amplifier; a first output phase shifter and a second output phase shifter.

Abstract: An integrated Doherty amplifier structure comprising; a main amplifier stage; at least one peak amplifier stage; an output combination bar configured to receive and combine an output from both the main amplifier stage and the or each peak amplifier stage; a main connection configured to connect an output of the main amplifier stage to the combination bar, the main connection comprising, at least in part, a bond wire forming a first inductance; a peak connection configured to connect an output of the peak amplifier stage to the combination bar; wherein the main connection connects to the combination bar at a first point along the bar and the peak connection connects to the combination bar at a second point along the bar spaced from the first point and the main amplifier stage is located further from the output combination bar than the at least one peak amplifier stage.

Abstract: Proposed is a bias circuit for a transistor in a C class amplifier. The bias circuit comprises: a class AB amplifier bias voltage generating means adapted to generate a bias voltage at an output terminal; and a transistor connected between the output terminal and a first reference voltage, the control terminal of the transistor being connected to a second reference voltage via a switch. Closure of the switch connects the second reference voltage to the control terminal of the transistor to cause a shift in the bias voltage generated by the class AB amplifier bias voltage generating means to achieve a predetermined class C bias voltage at the output terminal.

Abstract: Proposed is a bias circuit for a transistor in a C class amplifier. The bias circuit comprises: a class AB amplifier bias voltage generating means adapted to generate a bias voltage at an output terminal; and a transistor connected between the output terminal and a first reference voltage, the control terminal of the transistor being connected to a second reference voltage via a switch. Closure of the switch connects the second reference voltage to the control terminal of the transistor to cause a shift in the bias voltage generated by the class AB amplifier bias voltage generating means to achieve a predetermined class C bias voltage at the output terminal.

Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits may employ a baseband decoupling network connected in parallel with a low-pass RF matching network of the amplifier circuit.

Abstract: Amplifier apparatus comprising a power amplifier having an operating frequency in the radio frequency or microwave or higher ranges and a pre-distorter, the characteristics of the power amplifier comprising a distortion from a linear transfer function. The pre-distorter comprises a non-linear path and a linear path including amplifiers having substantially identical physical characteristics, an input divider responsive to an amplifier input signal for applying respective pre-distorter input signals to the paths, and an output coupler for combining the signals from the linear path and the non-linear path to produce a pre-distorted signal. The characteristics of the pre-distorter comprise a distortion relative to a linear transfer function that compensates for the distortion of the transfer function of the power amplifier.

Abstract: Amplifier apparatus comprising a power amplifier having an operating frequency in the radio frequency or microwave or higher ranges and a pre-distorter, the characteristics of the power amplifier comprising a distortion from a linear transfer function. The pre-distorter comprises a non-linear path and a linear path including amplifiers having substantially identical physical characteristics, an input divider responsive to an amplifier input signal for applying respective pre-distorter input signals to the paths, and an output coupler for combining the signals from the linear path and the non-linear path to produce a pre-distorted signal. The characteristics of the pre-distorter comprise a distortion relative to a linear transfer function that compensates for the distortion of the transfer function of the power amplifier.

Abstract: Parasitic coupling effects between RF or microwave transistors provided in a common package are compensated by connecting one or more capacitors between the transistors. By connecting the capacitor(s) at a location that corresponds to the site of the coupling, the compensation is effective over a wide frequency band. This coupling-compensation makes it feasible to provide, in a common package, RF or microwave transistors intended to operate in quadrature, thereby improving performance matching and operating efficiency of the overall device.

Abstract: A wireless communication unit comprises a semiconductor power amplifier device and a bias control circuit therefor. The bias control circuit comprises a detector for detecting at least a portion of the RF input signal; and a buffer for buffering the detected RF input signal. The detector is arranged to provide at least one inverted signal of the RF input signal. A semiconductor amplifier device is connected to an output of the bias control circuit and arranged to use an inverted detected signal to extract current from the output. When applied to a Doherty amplifier design, the biasing circuit requires fewer components, for example no video (buffer) amplifier and no delay block are required in the RF path. This facilitates integration of the circuit on a semiconductor die.