Patents by Inventor Jean-Louis Siaudeau

Jean-Louis Siaudeau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7629186
    Abstract: A method and a system of alignment of an integrated circuit chip pick-and-place equipment with an origin of a wafer supporting these circuits, comprising optically searching on the wafer at least one reference pattern formed, on manufacturing of the integrated circuits, in a reference chip, the reference pattern being different from optically-recognizable patterns of the other chips.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: December 8, 2009
    Assignee: STMicroelectronics SA
    Inventor: Jean-Louis Siaudeau
  • Patent number: 5612562
    Abstract: A semiconductor component for switching an inductive load, comprises first and second external terminals, first and second control terminals and a node. A vertical bipolar transistor has a base region and is disposed between the first external terminal and the node. A first vertical transistor is disposed between the node and the second external terminal. A zener diode and a second vertical transistor are connected parallel between the base and the node.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: March 18, 1997
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Jean-Louis Siaudeau, Antoine Pavlin
  • Patent number: 5438286
    Abstract: A circuit for the detection of an open load for a power MOS transistor is designed to operate in a switching mode. The MOS transistor is partitioned into two transistors disposed in parallel. The second transistor has a resistance in the conductive state higher than the first transistor. The circuit includes circuitry for enabling only the second transistor when the current is within a low value range, and circuitry for detecting an open load when the circuit is operating within the low current range.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: August 1, 1995
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventors: Antoine Pavlin, Jean-Louis Siaudeau