Abstract: The invention relates to a digital radiocommunication system having an antenna, one or several modems and frequency translators. The system also has at least one device external to the modems connected firstly to at least one modem, and secondly to at least one frequency translator. This device is designed to execute mathematical processing in base band on communication signals output from the modem and/or the translator, for example such as modulation by spectrum spreading of the signal received from the modem; and demodulation by spectrum dispreading of the signal received from frequency translators. Another purpose of the invention is a signal processing method like that used in the system. The invention is applicable to satellite radiocommunication systems onboard mobile ground stations capable of communicating while in movement.

Abstract: A divider to divide a frequency Fe comprises at least the following elements: three flip-flop circuits, each of the flip-flop circuits receiving the frequency to be divided, every feedback loop between an output of a flip-flop circuit and its input or the input of the other flip-flop circuits comprising a single multiplexer, wherein one of the flip-flop circuits commands the loading of all the flip-flop circuits during one period of the frequency A multiplexer has two inputs, one selection bit and one output and is integrated into a flip-flop circuit.

Abstract: A method and device of frequency division with a division ratio: comprising: an input divider with a division ratio NPs receiving the frequency Fe at input and delivering a signal to an insertion/substitution divider, the insertion/substitution divider having an input of variation of the division ratio, delivering a command frame to the input divider and generating an end-of-count signal, the insertion/substitution divider being adapted to the insertion of one or more input divider cycles and/or the substitution of an input divider cycle in the command frame.

Abstract: The disclosure pertains to continuous-time filtering. More particularly, it relates to filtering in a feedback control loop, for example in a sigma-delta (??) modulator. The making of a filter for this type of application comes up against a major problem linked to the relativity between the amplitude and phase responses. This limits the possibilities of choice in order to take steps against the instability of the loop. A continuous-time filter with minimum phase variation carries out the bandpass integration of the signal presented at its input. The making of the continuous-time filter as a bandpass integrator raises the problem of achieving a compromise between gain variations and phase variations close to the ?1 critical point, This compromise must lead to the stability of the loop. This problem is resolved by using a continuous-time bandpass integrating filter comprising at least one resonance device with minimum phase variation.

Abstract: In a frequency divider enabling the division by N of a frequency Fe and comprising at least one prescaler followed by a division chain, the prescaler has at least one input for the frequency signal Fe to be divided, one input for a command NA of the basic division rank of the prescaler and one input for a command ?NA coming from the division chain and enabling NA to be made to vary by one unit; the division chain comprises at least one division stage (K) comprising at least one divider by 2, giving a divided frequency F(K), a switch controlled by the divider by 2, the switch having one input for a piece of programming data R(K), one input for the carry signal RX(K+1) of the next stage and one output for the carry signal RX(K) for the previous stage. Application to the field of phase-locked loop frequency synthesis.

Abstract: A method and device of frequency division with a division ratio: comprising: an input divider with a division ratio NPs receiving the frequency Fe at input and delivering a signal to an insertion/substitution divider, the insertion/substitution divider having an input of variation of the division ratio, delivering a command frame to the input divider and generating an end-of-count signal, the insertion/substitution divider being adapted to the insertion of one or more input divider cycles and/or the substitution of an input divider cycle in the command frame.

Abstract: A divider to divide a frequency Fe comprises at least the following elements: three flip-flop circuits, each of the flip-flop circuits receiving the frequency to be divided, every feedback loop between an output of a flip-flop circuit and its input or the input of the other flip-flop circuits comprising a single multiplexer, wherein one of the flip-flop circuits commands the loading of all the flip-flop circuits during one period of the frequency A multiplexer has two inputs, one selection bit and one output and is integrated into a flip-flop circuit.

Abstract: In a frequency divider enabling the division by N of a frequency Fe and comprising at least one prescaler followed by a division chain, the prescaler has at least one input for the frequency signal Fe to be divided, one input for a command NA of the basic division rank of the prescaler and one input for a command &Dgr;NA coming from the division chain and enabling NA to be made to vary by one unit; the division chain comprises at least one division stage (K) comprising at least one divider by 2, giving a divided frequency F(K), a switch controlled by the divider by 2, the switch having one input for a piece of programming data R(K), one input for the carry signal RX(K+1) of the next stage and one output for the carry signal RX(K) for the previous stage. Application to the field of phase-locked loop frequency synthesis.

Abstract: A method and device is provided to synthesize a frequency F1→F2 with high spectral purity, the device entails a variable-step synthesizer F3→F4, which contains and least one variable-rank divider Nb located after the synthesizer and a frequency control device delivering the division rank command of the variable-rank divider, the command of the frequency of the variable-step synthesizer and the command of the synthesis step of the variable-step synthesizer.

Abstract: The disclosure pertains to continuous-time filtering. More particularly, it relates to filtering in a feedback control loop, for example in a sigma-delta (&Sgr;&Dgr;) modulator. The making of a filter for this type of application comes up against a major problem linked to the relativity between the amplitude and phase responses. This limits the possibilities of choice in order to take steps against the instability of the loop. A continuous-time filter with minimum phase variation carries out the bandpass integration of the signal presented at its input. The making of the continuous-time filter as a bandpass integrator raises the problem of achieving a compromise between gain variations and phase variations close to the −1 critical point, This compromise must lead to the stability of the loop. This problem is resolved by using a continuous-time bandpass integrating filter comprising at least one resonance device with minimum phase variation.

Abstract: A direct digital frequency-synthesis device includes a modulo-M coherent accumulator that generates a first phase law from a frequency-control word. A table, addressed by a second phase law derived from the first phase law, generates a digital sinusoidal signal. A digital/analog converter converts the digital sinusoidal signal into an analog sinusoidal signal. A filter filters the analog sinusoidal signal. And, a divider divides the filtered signal. The divider has a lower order than M and has a synchronization input driven by a synchronization pulse for re-synchronizing the signal after division, the synchronization pulse being derived from the phase law. Such a device may find particular application to digital synthesizers for radar.

Abstract: A method and device for the generation of a random signal, comprising: A first step (a) for the generation of a pseudo-random signal, a second step (b) for the filtering (F1) of the signal coming from the step (a) to obtain a signal x(t) having a predetermined spectral envelope H(f), a third step (c) in which a non-linear function g is applied to the signal x(t) so as to form a signal y(t) and create overshoots on the edges of the histogram of the signal y(t), a fourth filtering (F2) step (d) used to smoothen the overshoots of the histogram of the signal y(t), compensate for the effect of the non-linearity and carry out an additional filtering at (F1). Application to a system of analog-digital conversion or digital-analog conversion.

Abstract: A method and device for the generation of a random signal, comprising:

Abstract: A sigma-delta modulator having a propagation delay &Dgr;t between an input of an analog-to-digital converter and an output of the digital-to-analog converter. A subtractor is located in a direct chain between an amplification unit and the analog-to-direct converter. The output of the amplification unit is connected to a first direct input of the subtractor. An output of the subtractor is connected to the input of the analog-to-digital convertor. The modulator also includes a compensation filter located between the output of the subtractor and a second inverter input of the subtractor. When considering an impulse response of the modulator, at the output of the subtractor, to an impulse sent at the output of the subtractor, including a first part covering a first time interval 0; T with T≧&Dgr;t, and a second part covering a second time interval T; ∝, the compensation filter is designed to contribute to the first part and the amplification unit is designed to contribute only to the second part.

Abstract: The invention relates to a device for the linearization of a frequency modulation ramp comprising a voltage controlled oscillator associated with a phase locked-loop. The device comprises a digitally controlled oscillator of which only the most heavily weighted bit is used, and a digital phase comparator receiving, on the one hand, said most heavily weighted bit and, on the other hand, a signal supplied by the voltage controlled oscillator. Application to very high linearity and very high accuracy radio altimeters.

Abstract: A process and device for generation of a random signal, and a digital-analog conversion system using such a random signal.

Abstract: The method consists of the adding of a dither signal of constant amplitude, frequency-modulated by noise, to the signal applied to the input of the converter. An automatic control link is set up between the level of the added interference signal and the signal applied to the input of the converter so that the level of the input signal added to the level of the added interference signal is equal to the level of the full scale signal of the converter. Application to digital communications radio receivers.

Abstract: A digital frequency synthesizer comprises means for the generation of the samples of a digital signal to be converted into an analog signal encoded on N bits as a function of a frequency control word, means for the generation of a noise signal encoded on N bits, and a digital-analog converter, the useful signal and the noise signal being truncated to M bits before being added up by an adder. The result of the addition is converted into analog signal form by the digital-analog converter. The generated noise has at least a noise density substantially equal to a law of equiprobability, this density being zero outside a given space. Application especially to direct digital synthesis, for example in the field of radar techniques or that of instrumentation.

Abstract: A frequency synthesizer comprises a single phase-locked loop controlled by a reference clock formed by a voltage-controlled oscillator, a programmable divider with variable division rank M, a phase detector, and a loop filter. It also comprises a predetermined number n of fractional division structures, each implementing a frequency step Pi×FreF lower than the reference frequency Fref.

Abstract: Present-day single or multiple fractional phase-locked loop frequency synthesizers are not phase coherent for they use a digital accumulator modulo a number P with a variable increment K, whose state is a function of the history of the change in values that have been imposed on the increment. This lack of phase coherence rules out the use of these synthesizers in certain fields such as that of Doppler radars. A novel type of single or multiple fractional phase-locked loop frequency synthesizer that is coherent in phase is proposed herein. This type of synthesizer comprises one or more counters with an increment of one, having their rate set by the reference oscillator of the synthesizer and being used in phase memories to enable changes in the increment or increments following a change in the fractional division ratio at instants that are synchronous with the reference oscillator.