Patents by Inventor Jean-Luc Diot

Jean-Luc Diot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7668449
    Abstract: A barrel for an electrically-controllable variable focal length lens in a button-battery type housing includes a hollow isolating cylindrical tube with an inner diameter substantially equal to that of the lens housing, with one or bumps extending radially towards the inside of the tube and forming bearing surfaces for the lens periphery in a same radial plane. First metallizations extend on at least one of the bearing surfaces and therefrom into first channels formed in the internal wall of the tube towards at least one end of the tube, and second metallizations, each of which forms a contact area on the internal surface of the tube to bear against the lateral surface of the lens and extends towards at least one end of the cylinder.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: February 23, 2010
    Assignee: STMicroelectronics SA
    Inventors: Eric Saugier, Jean-Luc Diot, Fabrice Mee
  • Patent number: 7358598
    Abstract: A semiconductor package includes a flat metal leadframe including spaced apart portions, at least some of which constitute electrical connection leads. A filling material fills the spaces that separate the spaced apart portions of the leadframe to form a plate before fastening an integrated circuit chip to the front of the leadframe. Electrical connections are made between the chip and the electrical connection leads. The chip is then encapsulated on the front of the leadframe using a formed or attached encapsulant.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: April 15, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Jean-Luc Diot, Jerome Teysseyre
  • Patent number: 7326968
    Abstract: A semiconductor packaging unit mounts onto a board by solder joints. The unit includes, disposed along one axis, a semiconductor component having on a rear face protruding electrical connection lugs designed to be soldered onto the board and an external cage surrounding the component and having a rear edge designed to be soldered onto the board and a front part through which a front part of the component passes. The component and the cage are designed to axially slide with respect to one another in such a manner as to be brought into their soldering position with respect to the board and having complementary holding parts coming into contact and designed to hold them with respect to one another when they are axially removed from the soldering position and to free them with respect to one another when they are at the soldering position.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: February 5, 2008
    Assignees: STMicroelectronics S.A., STMicroelectronics R&D Ltd.
    Inventors: Rémi Brechignac, Jean-Luc Diot, Kevin Channon, Eric Chistison
  • Publication number: 20070228558
    Abstract: A semiconductor packaging unit mounts onto a board by solder joints. The unit includes, disposed along one axis, a semiconductor component having on a rear face protruding electrical connection lugs designed to be soldered onto the board and an external cage surrounding the component and having a rear edge designed to be soldered onto the board and a front part through which a front part of the component passes. The component and the cage are designed to axially slide with respect to one another in such a manner as to be brought into their soldering position with respect to the board and having complementary holding parts coming into contact and designed to hold them with respect to one another when they are axially removed from the soldering position and to free them with respect to one another when they are at the soldering position.
    Type: Application
    Filed: March 19, 2007
    Publication date: October 4, 2007
    Applicants: STMicroelectronics S.A., STMicroelectronics R&D Ltd.
    Inventors: Remi Brechignac, Jean-Luc Diot, Kevin Channon, Eric Chistison
  • Publication number: 20070072065
    Abstract: A barrel for an electrically-controllable variable focal length lens in a button-battery type housing includes a hollow isolating cylindrical tube with an inner diameter substantially equal to that of the lens housing, with one or bumps extending radially towards the inside of the tube and forming bearing surfaces for the lens periphery in a same radial plane. First metallizations extend on at least one of the bearing surfaces and therefrom into first channels formed in the internal wall of the tube towards at least one end of the tube, and second metallizations, each of which forms a contact area on the internal surface of the tube to bear against the lateral surface of the lens and extends towards at least one end of the cylinder.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 29, 2007
    Applicant: STMICROELECTRONICS SA
    Inventors: Eric Saugier, Jean-Luc Diot, Fabrice Mee
  • Patent number: 6885088
    Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: April 26, 2005
    Assignee: STMicroelectronics SA
    Inventors: Jean-Luc Diot, Christophe Prior, Jérome Teysseyre, Jean-Pierre Moscicki
  • Publication number: 20050017330
    Abstract: A semiconductor package includes a flat metal leadframe including spaced apart portions, at least some of which constitute electrical connection leads. A filling material fills the spaces that separate the spaced apart portions of the leadframe to form a plate before fastening an integrated circuit chip to the front of the leadframe. Electrical connections are made between the chip and the electrical connection leads. The chip is then encapsulated on the front of the leadframe using a formed or attached encapsulant.
    Type: Application
    Filed: April 19, 2004
    Publication date: January 27, 2005
    Applicant: STMicroelectronics S.A.
    Inventors: Jean-Luc Diot, Jerome Teysseyre
  • Patent number: 6838752
    Abstract: A semiconductor package is provided that includes a flat leadframe having front and rear faces. The leadframe includes a central platform and elongate electrical connection leads distributed around this platform. Electrical connection wires connect the chip to the front face of the leads, and encapsulation means encapsulates the chip such that the rear face of the leadframe is visible. The electrical connection leads include an inner end part and an outer end part, the rear faces of the inner and outer end parts lie in the plane of the rear face of the leadframe, and the inner and outer end parts are connected by a branch whose rear face is set back with respect to the plane of the rear face of the leadframe so as to define a rear recess. The electrical connection wires are connected to the leads on the front face of their inner end part.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: January 4, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Jean-Luc Diot
  • Publication number: 20030234446
    Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.
    Type: Application
    Filed: February 20, 2003
    Publication date: December 25, 2003
    Applicant: STMicroelectronics SA
    Inventors: Jean-Luc Diot, Christophe Prior, Jerome Teysseyre, Jean-Pierre Moscicki
  • Publication number: 20030025189
    Abstract: A semiconductor package is provided that includes a flat leadframe having front and rear faces. The leadframe includes a central platform and elongate electrical connection leads distributed around this platform. Electrical connection wires connect the chip to the front face of the leads, and encapsulation means encapsulates the chip such that the rear face of the leadframe is visible. The electrical connection leads include an inner end part and an outer end part, the rear faces of the inner and outer end parts lie in the plane of the rear face of the leadframe, and the inner and outer end parts are connected by a branch whose rear face is set back with respect to the plane of the rear face of the leadframe so as to define a rear recess. The electrical connection wires are connected to the leads on the front face of their inner end part.
    Type: Application
    Filed: May 31, 2002
    Publication date: February 6, 2003
    Applicant: STMICROELECTRONICS S.A.
    Inventor: Jean-Luc Diot