Patents by Inventor Jean-Luc Huguenin
Jean-Luc Huguenin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230050334Abstract: In an embodiment a method for manufacturing an image sensor includes forming of a plurality of microlenses at a first resin layer, forming a mask on top of and in contact with the first resin layer, the mask comprising a second resin; and chemical plasma etching the first resin layer through the mask.Type: ApplicationFiled: July 27, 2022Publication date: February 16, 2023Inventors: Pierre Bar, Jean Luc Huguenin
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Patent number: 11562927Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: GrantFiled: April 12, 2021Date of Patent: January 24, 2023Assignee: STMicroelectronics SAInventors: Didier Dutartre, Jean-Pierre Carrere, Jean-Luc Huguenin, Clement Pribat, Sarah Kuster
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Publication number: 20210233811Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: ApplicationFiled: April 12, 2021Publication date: July 29, 2021Applicant: STMicroelectronics SAInventors: Didier DUTARTRE, Jean-Pierre CARRERE, Jean-Luc HUGUENIN, Clement PRIBAT, Sarah KUSTER
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Patent number: 10978340Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: GrantFiled: April 15, 2019Date of Patent: April 13, 2021Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Didier Dutartre, Jean-Pierre Carrere, Jean-Luc Huguenin, Clement Pribat, Sarah Kuster
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Patent number: 10497735Abstract: The invention relates to an image sensor and method for reducing image defects. A photoconversion area is formed in a semiconductor layer. An insulating layer formed over the semiconductor layer contains a metal element. A lens over the insulting layer is positioned opposite the photoconversion area to focus light on it. A layer of light-absorbing material is deposited on the side of the metal element facing the lens to prevent reflection of parasitic light rays within the image device.Type: GrantFiled: March 20, 2018Date of Patent: December 3, 2019Assignee: STMICROELECTRONICS (CROLLES 2) SASInventors: Axel Crocherie, Etienne Mortini, Jean Luc Huguenin
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Publication number: 20190244857Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: ApplicationFiled: April 15, 2019Publication date: August 8, 2019Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Didier DUTARTRE, Jean-Pierre CARRERE, Jean-Luc HUGUENIN, Clement PRIBAT, Sarah KUSTER
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Patent number: 10262898Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: GrantFiled: April 7, 2016Date of Patent: April 16, 2019Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SASInventors: Didier Dutartre, Jean-Pierre Carrere, Jean-Luc Huguenin, Clement Pribat, Sarah Kuster
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Publication number: 20180331136Abstract: The invention relates to an image sensor and method for reducing image defects. A photoconversion area is formed in a semiconductor layer. An insulating layer formed over the semiconductor layer contains a metal element. A lens over the insulting layer is positioned opposite the photoconversion area to focus light on it. A layer of light-absorbing material is deposited on the side of the metal element facing the lens to prevent reflection of parasitic light rays within the image device.Type: ApplicationFiled: March 20, 2018Publication date: November 15, 2018Inventors: Axel Crocherie, Etienne Mortini, Jean Luc Huguenin
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Patent number: 9985119Abstract: An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer disposed above the photodiode, a dielectric region disposed above the antireflection layer, an optical filter disposed above the dielectric region, and a diffraction grating disposed in the antireflection layer. The diffraction grating includes an array of pads.Type: GrantFiled: April 17, 2017Date of Patent: May 29, 2018Assignees: STMICROELECTRONICS S.A., STMICROELECTRONICS (Crolles 2) SASInventors: Axel Crocherie, Michel Marty, Jean-Luc Huguenin, Sébastien Jouan
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Publication number: 20170294379Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.Type: ApplicationFiled: April 7, 2016Publication date: October 12, 2017Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SASInventors: Didier Dutartre, Jean-Pierre Carrere, Jean-Luc Huguenin, Clement Pribat, Sarah Kuster
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Publication number: 20170221948Abstract: An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer disposed above the photodiode, a dielectric region disposed above the antireflection layer, an optical filter disposed above the dielectric region, and a diffraction grating disposed in the antireflection layer. The diffraction grating includes an array of pads.Type: ApplicationFiled: April 17, 2017Publication date: August 3, 2017Inventors: Axel Crocherie, Michel Marty, Jean-Luc Huguenin, Sébastien Jouan
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Patent number: 9685472Abstract: An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer above the photodiode, a dielectric region above the antireflection layer and an optical filter to pass incident luminous radiation having a given wavelength. The antireflection layer may include an array of pads mutually separated by a dielectric material of the dielectric region. The array may be configured to allow simultaneous transmission of the incident luminous radiation and a diffraction of the incident luminous radiation producing diffracted radiations which have wavelengths below that of the incident radiation, and are attenuated with respect to the incident radiation.Type: GrantFiled: February 23, 2016Date of Patent: June 20, 2017Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SASInventors: Axel Crocherie, Michel Marty, Jean-Luc Huguenin, Sébastien Jouan
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Publication number: 20170062507Abstract: An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer above the photodiode, a dielectric region above the antireflection layer and an optical filter to pass incident luminous radiation having a given wavelength. The antireflection layer may include an array of pads mutually separated by a dielectric material of the dielectric region. The array may be configured to allow simultaneous transmission of the incident luminous radiation and a diffraction of the incident luminous radiation producing diffracted radiations which have wavelengths below that of the incident radiation, and are attenuated with respect to the incident radiation.Type: ApplicationFiled: February 23, 2016Publication date: March 2, 2017Inventors: Axel CROCHERIE, Michel MARTY, Jean-Luc HUGUENIN, Sébastien JOUAN
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Patent number: 8912067Abstract: A method for manufacturing three types of MOS transistors in three regions of a same substrate, including the steps of: forming a first insulating layer, removing the first insulating layer from the first and second regions, forming a silicon oxide layer, depositing an insulating layer having a dielectric constant which is at least twice greater than that of silicon oxide, depositing a first conductive oxygen scavenging layer, removing the first conductive layer from the second and third regions, and annealing.Type: GrantFiled: September 20, 2011Date of Patent: December 16, 2014Assignee: STMicroelectronics (Crolles 2) SASInventors: Jean-Luc Huguenin, Grégory Bidal
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Patent number: 8772879Abstract: An electronic component including a number of insulated-gate field effect transistors, said transistors belonging to at least two distinct subsets by virtue of their threshold voltage, wherein each transistor includes a gate that has two electrodes, namely a first electrode embedded inside the substrate where the channel of the transistor is defined and a second upper electrode located above the substrate facing buried electrode relative to channel and separated from said channel by a layer of dielectric material and wherein the embedded electrodes of all the transistors are formed by an identical material, the upper electrodes having a layer that is in contact with the dielectric material which is formed by materials that differ from one subset of transistors to another.Type: GrantFiled: June 4, 2012Date of Patent: July 8, 2014Assignee: STMicroelectronics (Crolles 2) SASInventors: Jean-Luc Huguenin, Stéphane Monfray
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Publication number: 20120313182Abstract: An electronic component including a number of insulated-gate field effect transistors, said transistors belonging to at least two distinct subsets by virtue of their threshold voltage, wherein each transistor includes a gate that has two electrodes, namely a first electrode embedded inside the substrate where the channel of the transistor is defined and a second upper electrode located above the substrate facing buried electrode relative to channel and separated from said channel by a layer of dielectric material and wherein the embedded electrodes of all the transistors are formed by an identical material, the upper electrodes having a layer that is in contact with the dielectric material which is formed by materials that differ from one subset of transistors to another.Type: ApplicationFiled: June 4, 2012Publication date: December 13, 2012Applicant: STMicroelectronics (Crolles 2) SASInventors: Jean Luc Huguenin, Stéphane Monfray
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Publication number: 20120083110Abstract: A method for manufacturing three types of MOS transistors in three regions of a same substrate, including the steps of: forming a first insulating layer, removing the first insulating layer from the first and second regions, forming a silicon oxide layer, depositing an insulating layer having a dielectric constant which is at least twice greater than that of silicon oxide, depositing a first conductive oxygen scavenging layer, removing the first conductive layer from the second and third regions, and annealing.Type: ApplicationFiled: September 20, 2011Publication date: April 5, 2012Applicant: STMicroelectronics (Crolles 2) SASInventors: Jean-Luc Huguenin, Grégory Bidal