Patents by Inventor Jean-Marc Papillon

Jean-Marc Papillon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180019194
    Abstract: A semiconductor device has an interposer and a surface mount technology (SMT) component disposed on the interposer. The interposer is disposed on an active surface of a semiconductor die. The semiconductor die is disposed on a substrate. A first wire bond connection is formed between the interposer and semiconductor die. A second wire bond connection is formed between the interposer and substrate. A third wire bond connection is formed between the substrate and semiconductor die. An encapsulant is deposited over the substrate, semiconductor die, interposer, and SMT component. In one embodiment, the substrate is a quad flat non-leaded substrate. In another embodiment, the substrate is a land-grid array substrate, ball-grid array substrate, or leadframe.
    Type: Application
    Filed: July 12, 2017
    Publication date: January 18, 2018
    Applicant: Semtech Corporation
    Inventor: Jean-Marc Papillon
  • Patent number: 6774742
    Abstract: A substrate interface system and method are provided for connecting a coplanar waveguide transmission line to a coaxial connector. The system comprises a substrate having a top surface with a coplanar waveguide having a transmission line interposed between coplanar groundplanes. A housing wall assembly has an aperture and an interior surface adjacent the substrate coplanar waveguide. A coaxial connector, mounted in the housing wall assembly through the aperture, has a center conductor connected to the coplanar waveguide transmission line and a ground connected to the housing wall assembly. Extensions are mounted on the wall assembly interior surface, connected to the coplanar waveguide groundplanes. The substrate need not be grounded to the coaxial connector through a substrate bottom surface groundplane/chassis interface.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: August 10, 2004
    Assignee: Applied MicroCircuits Corporation
    Inventors: Michel Fleury, Steven Jeffrey Martin, Jean-Marc Papillon, Francois Guindon
  • Patent number: 6762494
    Abstract: An electronic package component includes a flip-chip device mounted to a BGA substrate. The BGA substrate includes conductive traces formed on its upper surface and configured in a coplanar waveguide structure. The package includes a dielectric coating applied over the conductive traces and over the upper surface of the substrate. The coating is formed from a material having a dielectric constant that is equal to or approximately equal to the dielectric constant of the BGA substrate material. The dielectric coating reduces the adverse effects caused by phase velocity dispersion of the signal propagated by the coplanar waveguide.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: July 13, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventors: Siamak Fazelpour, Jean-Marc Papillon, Steven J. Martin