Abstract: Implementing a camouflage of current traces generated by a hardware component having one or more set of digital elements defining a plurality of operational datapaths comprises adjusting (761) one or more working condition(s) of the hardware component, measuring (762) a reaction of the hardware component to the working condition(s) by a logic test circuit through processing data operations along a reference datapath having a minimum duration corresponding to at least the longest of the operational datapaths, and in response to detecting an error (763) along the reference datapath, modifying (764) the working condition(s) so that the error generated by the logic test circuit is cancelled. Applications to countermeasures to side-channel attacks.

Abstract: A method for detecting perturbations in a logic circuit including a plurality of datapaths coordinated by a clock signal and at least one test circuit having a programmable length datapath for varying a test propagation delay. The test circuit further including inputs, an output and an error generator for providing an error in case that the output is different than an expected output for the inputs. The test circuit having a calibration mode including determining a critical propagation delay by varying the programmable length datapath until the error generator outputs an error, adjusting the programmable length datapath to include therein a tolerance delay, and switching into a detection mode configured to detect a perturbation in the logic circuit along the programmable length datapath in case the error generator outputs an error.

Abstract: A method for detecting perturbations in a logic circuit including a plurality of datapaths coordinated by a clock signal and at least one test circuit having a programmable length datapath for varying a test propagation delay. The test circuit further including inputs, an output and an error generator for providing an error in case that the output is different than an expected output for the inputs. The test circuit having a calibration mode including determining a critical propagation delay by varying the programmable length datapath until the error generator outputs an error, adjusting the programmable length datapath to include therein a tolerance delay, and switching into a detection mode configured to detect a perturbation in the logic circuit along the programmable length datapath in case the error generator outputs an error.

Abstract: Implementing a camouflage of current traces generated by a hardware component having one or more set of digital elements defining a plurality of operational datapaths comprises adjusting (761) one or more working condition(s) of the hardware component, measuring (762) a reaction of the hardware component to the working condition(s) by a logic test circuit through processing data operations along a reference datapath having a minimum duration corresponding to at least the longest of the operational datapaths, and in response to detecting an error (763) along the reference datapath, modifying (764) the working condition(s) so that the error generated by the logic test circuit is cancelled. Applications to countermeasures to side-channel attacks.

Abstract: A method for detecting at least one glitch in an electrical signal. This method comprises: generating, from said electrical signal, at least one digital oscillating signal which is sensitive to glitches; and—performing the following steps as a repeatable round: (a) assigning a time window to at least one digital oscillating signal; said time window being implemented on the basis of a clock signal substantially insensitive to said at least one glitch to be detected; (b) determining from said time window a sampling value of the digital oscillating signal, said sampling value being characteristic of said digital oscillating signal throughout its time window; (c) detecting any potential glitch in said electrical signal by comparing said sampling value with an expected reference value; and (d) outputting a response typifying a result of the comparison step. Also, a device for implementing said method is described.

Abstract: A method and a device for detecting an attack on an integrated circuit. Attacks which are detectable using an active shield as described herein include physical and electrical contacting using a probe and modification of interconnect routing, including modification through the use of focused ion beam technology.

Abstract: A method for detecting at least one glitch in an electrical signal. This method comprises: generating, from said electrical signal, at least one digital oscillating signal which is sensitive to glitches; and—performing the following steps as a repeatable round: (a) assigning a time window to at least one digital oscillating signal; said time window being implemented on the basis of a clock signal substantially insensitive to said at least one glitch to be detected; (b) determining from said time window a sampling value of the digital oscillating signal, said sampling value being characteristic of said digital oscillating signal throughout its time window; (c) detecting any potential glitch in said electrical signal by comparing said sampling value with an expected reference value; and (d) outputting a response typifying a result of the comparison step. Also, a device for implementing said method is described.

Abstract: A method and a device for detecting an attack on an integrated circuit. Attacks which are detectable using an active shield as described herein include physical and electrical contacting using a probe and modification of interconnect routing, including modification through the use of focused ion beam technology.

Abstract: An arrangement of bearing supports for a rotating shaft mounted on bearings connected to an engine stator structure by bearing supports of which at least one is made up of N>1 elements effectively acting in parallel to simultaneously connect the bearing to the structure, of which N?1 of the N elements form this connection by fusible links, is made up of a first bearing supported by a first bearing support and a second bearing supported by a second bearing support, that of the two bearing supports which makes up the N>1 elements being the second bearing support.

Abstract: This method of compressing messages, in particular messages intended to be displayed on a telecommunications terminal, in particular a portable telephone, is essentially characterized in that, with said messages being made up of words themselves made up of characters, it includes compiling two encoding tables, namely an “encoding table for compressing words”, causing each compressed word represented by its rank in the table to correspond to a “semi-compressed” word made up of a sequence of compressed characters corresponding to the word, and an “encoding table for compressing characters”, causing each compressed character represented by its rank in the table to correspond to a non-compressed character.

Abstract: The jitter of a serial digital signal is measured by determining a recurrent time window and generating a measurement ramp for each window for which the amplitude of the ramp grows proportional to the positive transition of the digital signal. The amplitude of the ramps at the end of each recurrence of the time windows is converted to digital valves and the digital values are used to calculate jitter.

Abstract: A lifting surface, a deposit surface and a transfer assembly is equipped with electromagnets and counter-magnets, which when they are activated permit the grasping of one or more thicknesses of a material supplied upon the surface. The assembly transfers the grasped pieces to the surface and the counter-magnets are recuperated at the same time as the electromagnets, to their initial position.