Abstract: A communication system including a network and an information multiplexing device connected to the network is provided. The device includes a plurality of access terminals for receiving information to be transmitted, a plurality of connecting terminals coupled to the network, a plurality of service circuits having queue elements for storing the information, a plurality of network circuits which includes output circuits for transmitting information to the connecting terminals and an assigning element for assigning a period of time which information can be transmitted to the output circuits. The period of time being dependent on the rate of which the output circuit can transmit data.

Abstract: The management of the priorities of access to a memory is characterized in that each request generator module (DP,GP) separately formulates the requests for access to a single word (DPREQ1, GPREQ1) and the requests for access to a plurality of words (DPREQN, GPREQN); differing priorities (REGA, REGB, REGC, REGD) may then be allocated (VALREG) to each type of request. Advantageously the requests for a single word are arbitrated by a first module which transmits a selected request to a second module.

Abstract: A graphics system comprising a screen processor which separately formulates the requests for access to a single word and the requests for access to a plurality of consecutive words, a bus arbitrator to arbitrate the requests for access to a single word and to select a request, and a DRAM Dynamic Random Access Memory, controller to arbitrate the requests for a plurality of words and the refresh requests. The DRAM controller preferably comprises an automatic system which directly generates line and column control signals. The automatic system is preferably constructed in the form of a PLA (Program Logic Array).