Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.

Abstract: This document discloses one-time-programmable (“OTP”) memory emulation and methods of performing the same. OTP memory can be emulated by managing reads and writes to a memory array in response to an instruction to write data to a OTP memory location and selectively setting a security flag that corresponds to the memory locations. The memory array can be a NAND Flash memory array that includes multiple pages of memory. The memory array can be defined by memory blocks that can include multiple pages of memory. When an OTP write instruction is received, previously stored data can be read from a first page of memory, combined with the new data and stored to a target page of memory. A security flag can be set to prevent the target page from being reprogrammed prior to an erase.

Abstract: A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.

Abstract: A subset of software objects stored in a first segment of non-volatile memory are identified as requiring frequent write operations or otherwise associated with a high endurance requirement. The subset of software objects are move to a second segment of non-volatile memory with a high endurance capacity, due to the application of wear leveling techniques to the second segment of non-volatile memory. The first and second segments of memory can be located in the same memory device or different memory devices.

Abstract: A subset of software objects stored in a first segment of non-volatile memory are identified as requiring frequent write operations or otherwise associated with a high endurance requirement. The subset of software objects are move to a second segment of non-volatile memory with a high endurance capacity, due to the application of wear leveling techniques to the second segment of non-volatile memory. The first and second segments of memory can be located in the same memory device or different memory devices.

Abstract: This document discloses one-time-programmable (“OTP”) memory emulation and methods of performing the same. OTP memory can be emulated by managing reads and writes to a memory array in response to an instruction to write data to a OTP memory location and selectively setting a security flag that corresponds to the memory locations. The memory array can be a NAND Flash memory array that includes multiple pages of memory. The memory array can be defined by memory blocks that can include multiple pages of memory. When an OTP write instruction is received, previously stored data can be read from a first page of memory, combined with the new data and stored to a target page of memory. A security flag can be set to prevent the target page from being reprogrammed prior to an erase.