Patents by Inventor Jean-Patrice Coste

Jean-Patrice Coste has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory circuit with supply voltage flexibility and supply voltage adapted performance
    Patent number: 7355915
    Abstract: The inventive memory circuit comprises a plurality of memory cells. The memory circuit further comprises a memory access means being controlled by at least one control signal. In addition, a control means for generating the at least one control signal is contained in the memory circuit, with the control means comprising a delay means. The delay means delays a switching of the at least one control signal. The delay time is adjustable in view of the applied supply voltage.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: April 8, 2008
    Assignee: Infineon Technologies AG
    Inventors: Vincent Gouin, Jean-Patrice Coste, Christophe Chanussot
  • Fuse blowing interface for a memory chip
    Patent number: 7085182
    Abstract: A fuse blowing interface (7) for a memory chip (1) comprising a latch register for latching a calculated memory repair solution when a prefuse request signal is received from an external tester device (8); and a fuse blowing unit with electrical fuses which are blown according to the calculated memory repair solution when a blow request signal is received from the external tester device (8).
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: August 1, 2006
    Assignee: Infineon Technologies AG
    Inventors: Michel Collura, Jean-Patrice Coste, Yannis Jallamion-Grive
  • Memory circuit with supply voltage flexibility and supply voltage adapted performance
    Publication number: 20060050572
    Abstract: The inventive memory circuit comprises a plurality of memory cells. The memory circuit further comprises a memory access means being controlled by at least one control signal. In addition, a control means for generating the at least one control signal is contained in the memory circuit, with the control means comprising a delay means. The delay means delays a switching of the at least one control signal. The delay time is adjustable in view of the applied supply voltage.
    Type: Application
    Filed: August 24, 2005
    Publication date: March 9, 2006
    Inventors: Vincent Gouin, Jean-Patrice Coste, Christophe Chanussot
  • Fuse blowing interface for a memory chip
    Publication number: 20050018517
    Abstract: A fuse blowing interface (7) for a memory chip (1) comprising a latch register for latching a calculated memory repair solution when a prefuse request signal is received from an external tester device (8); and a fuse blowing unit with electrical fuses which are blown according to the calculated memory repair solution when a blow request signal is received from the external tester device (8).
    Type: Application
    Filed: May 28, 2004
    Publication date: January 27, 2005
    Applicant: Infineon Technologies AG
    Inventors: Michel Collura, Jean-Patrice Coste, Yannis Jallamion-Grive